Add the period cell to GD32 PWM compatible and update all boards
accordingly. A period of 20 ms (50 Hz) has been set for all PWM LEDs.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Rather than specify input clock for each peripheral individually, instead
specify the relevant clocks in DTS.
This will enable easier support for non-default coreclk on fe310 in a
follow-up CL.
Signed-off-by: Shawn Nematbakhsh <shawn@rivosinc.com>
Improve documentation
- Add a photo of the board
- Add hardware information from the board manual
- Fix options for build (set OPENOCD_DEFAULT_PATH to make it
valid for also windows environment)
- Improve the build instructions to make it easier to understand
Signed-off-by: Yuichiro SAGISAKA <yu.sagisaka@fujitsu.com>
This commit makes the transition from the pinmux driver to the pinctrl
driver. It also modifies UART, SPI and I2C drivers used in FE310-based
boards to use the new pinctrl API.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Complete revamp of the exception entry code, including syscall handling.
Proper syscall frame exception trigger. Many correctness fixes, hacks
removal, etc. etc.
I tried to make this into several commits, but this stuff is all
inter-related and a pain to split.
The diffstat summary:
14 files changed, 250 insertions(+), 802 deletions(-)
Binary size (before):
text data bss dec hex filename
1104 0 0 1104 450 isr.S.obj
64 0 0 64 40 userspace.S.obj
Binary size (after):
text data bss dec hex filename
600 0 0 600 258 isr.S.obj
36 0 0 36 24 userspace.S.obj
Run of samples/userspace/syscall_perf (before):
*** Booting Zephyr OS build zephyr-v3.0.0-325-g3748accae018 ***
Main Thread started; qemu_riscv32
Supervisor thread started
User thread started
Supervisor thread(0x80010048): 384 cycles 509 instructions
User thread(0x80010140): 77312 cycles 77437 instructions
Run of samples/userspace/syscall_perf (after):
*** Booting Zephyr OS build zephyr-v3.0.0-326-g4c877a2753b3 ***
Main Thread started; qemu_riscv32
Supervisor thread started
User thread started
Supervisor thread(0x80010048): 384 cycles 509 instructions
User thread(0x80010138): 7040 cycles 7165 instructions
Yes, that's more than a 10x speed-up!
Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
Kconfig options now belong to the Kconfig domain, therefore, the
:kconfig:option: role needs to be used.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Set board flasher, so twister can run tests on ITE(it8xxx2_evb) board.
Add supported drivers of it8xxx2_evb board, so twister could run these
driver tests without skipping.
Signed-off-by: Fu Haolei <haolei.fu@intel.com>
This patch adds GPIO and 96board LS (Low Speed)iexpansion connector
support for SiFive HiFive Unleashed and also enables GPIO basic test.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Add pwm-0 to support tests/drivers/pwm/pwm_api.
Solve tests code runtime error on it8xxx2_evb:
1.If the pwm channel target frequency is < 1, then we will
return an error code.
2.If the target_freq is <= 324Hz, we will configure that this pwm
channel need to output in EC power saving mode.
In test_pwm_cycle() case, the period is 64000, then the
target_freq is 8000000 / 64000 = 125Hz and <= 324Hz, so we will
switch the prescaler clock source from 8MHz to 32.768kHz.
Then the target_freq is 32768 / 64000 = 0.512Hz and < 1Hz,
this will return an error code. In order to get the same
target_freq, we always return PWM_FREQ in
pwm_it8xxx2_get_cycles_per_sec().
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
The defconfig files are just used to change defaults, not to define any
new Kconfig nodes.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Define missing definition BOARD_LONGAN_NANO to defconfig.
And cleaning up some verbose comments.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
This modifies esp32c3 SOC configuration to support MCUBoot.
CmakeLists is moved from board to soc specific. It also
includes MCUBoot changes.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add watchdog0 to support tests/drivers/watchdog/wdt_basic_api.
Solve tests code runtime error on it8xxx2_evb:
1.When run the wdt tests api, we shouldn't reduce the warning
timer time, so I add config WDT_ITE_REDUCE_WARNING_LEADING_TIME,
this config will be enabled only on platform EC.
2.Upper limit window timeouts can't be 0 when we install timeout.
3.Since we support wdt_it8xxx2_disable(), then we should support
flag WDT_OPT_PAUSE_HALTED_BY_DBG, too. Watchdog can be stopped
by IT8XXX2_WDT_EWDSCEN bit of ETWCTRL reg.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add kscan0 to support tests/driver/kscan/kscan_api.
When running the tests code on it8xxx2_evb, it shows fatal
error: IRQ is enabled. We find that once polling_task() is
created and executed, the KSI interrupt will be enabled and
before we call irq_connect_dynamic(), so we switch both
function sequence.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Add configuration to support onboard LED and button.
- LED_R: PC13 (active low/output)
- LED_G: PA1 (active low/output)
- LED_B: PA2 (active low/output)
- BOOT0: PA8 (active high/input)
And enable timer1 to control LED_G and LED_B with PWM.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Add the aliases, we are able to build test of
tests/drivers/i2c/i2c_api for the it8xxx2_evb board.
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
Add initial support for the GD32VF103V-EVAL board. The board is based on
the GD32VF103 RISC-V MCU.
This board can run on Zephyr now largerly thanks to the initial work
done by @soburi.
Note that this board requires using the riscv-openocd fork, however,
programming is slow when using OpenOCD even though it works (including
debugging). J-Link option has also been enabled as it seems to be more
realiable and works _out of the box_. Some details are given in the
board documentation file.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Enable CONFIG_RISCV_PMP in qemu virt soc. Use this SoC as CI testing
platform of RISC-V PMP and Userspace.
Signed-off-by: Jim Shu <cwshu@andestech.com>
Modifying configuration to enable with gd32vf103
- Add usart definition to devicetree.
- Define USART_STAT as alias of USART_STAT0 if not defined it.
- Enable USART if SOC_SERIES_RISCV_GIGADEVICE_GD32VF103.
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
SiPeed Longan Nano is a minimal development board
based on GigaDevice's RISC-V processor.
There are 2 board variations.
longan_nano: GDGD32VF103CBT6 (128K Flash/32K SRAM)
longan_nano_lite: GDGD32VF103C8T6 ( 64K Flash/20K SRAM)
Signed-off-by: TOKITA Hiroshi <tokita.hiroshi@gmail.com>
Not all boards use the same UART's defaults properties.
This commit updates device tree declarations by deferring
specific definitions to the board's DTS.
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This commit implements west flash command for Telink B91 platform.
west flash command uses ICEman and SPI burn from AndeSight for flashing.
Signed-off-by: Alex Kolosov <rikorsev@gmail.com>
IT8XXX2 uses shared ns16550.c driver which does not provide a power
management callback(pm_action_cb), so create driver to handle
IT8XXX2 specific UART features.
note: pm_action_cb(old name: pm_control_fn)
Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
This commit adds required config files for Renode simulation and adds
missing QEMU_binary_suffix. It also adds flash and newlib tags to
ignore_tags, as flash chip is currently not provided by default in
Renode for FE310 and newlib does not fit into the available memory.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
Currently there is no way to support running a board on multiple
emulation platforms nor to choose a desired emulation platform for the
simulation to be run on. This commit introduces a new
SUPPORTED_EMU_PLATFORMS list, which defines available emulation
platforms for a given board.
Fixes#12375.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
These drivers are no longer enabled for every application,
even hello_world. The right SoC-specific drivers are
enabled in applications that need them.
Signed-off-by: Ruibin Chang <Ruibin.Chang@ite.com.tw>
Use i2c_hal functions to enable support for
multiple SoCs.
Use DT compat to enable I2C from device
tree configuration
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Add a few minor improvements to the NEORV32 board documentation based on
community feedback.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Gerard Marull-Paretas