Commit Graph

47 Commits

Author SHA1 Message Date
Anas Nashif 9426a3cbf9 arch: x86: set output format/arch per arch
Instead of doing this per platform, set the output format and arch on
architecture level.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-07-31 20:30:33 -04:00
Alex Tereschenko 3c1a78ea0d cmake: replace PROJECT_SOURCE_DIR with ZEPHYR_BASE
Both variables were used (with the same value) interchangeably
throughout CMake files and per the discussion in GH issue,
ZEPHYR_BASE is preferred.

Also add a comment with explanation of one vs. the other.

Tested by building hello_world for several boards ensuring no errors.

Fixes #7173.

Signed-off-by: Alex Tereschenko <alext.mkrs@gmail.com>
2018-06-18 15:25:55 -04:00
Ulf Magnusson 3ac3216d89 soc: defconfig: Consistently quote string defaults
In preparation for introducing a warning.

Unquoted string defaults work through a quirk of Kconfig (undefined
symbols get their name as their string value), but look confusing. It's
done inconsistently now too.

Suggested by Kumar Gala.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-05-26 19:17:48 -04:00
Tomasz Bursztyka 61ef30d10e drivers/uart: Use dts to set uart options for ns16550 driver
Fix the ns16550 uart driver and relevant SoCs accordingly.
All generic settings are now DTS based.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2018-05-18 20:18:50 +03:00
Savinay Dharmappa e524f0b846 dts: x86: derive RAM and ROM size from dts instead of Kconfig
patch removes Kconfig defines for RAM and ROM size in x86. Instead
these values are derived from dts.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2018-05-14 17:19:23 -04:00
Kumar Gala d08661119e dts: ia32: Refactor SoC dts.fixup into arch/x86/soc/ia32
Move common SoC dts.fixup defines into arch/x86/soc/ia32/dts.fixup so we
remove duplication in the boards and only have board specific defines in
boards/x86/<FOO>/dts.fixup.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-02-26 10:55:36 -06:00
Sebastian Bøe 0829ddfe9a kbuild: Removed KBuild
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Sebastian Bøe 12f8f76165 Introduce cmake-based rewrite of KBuild
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.

Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.

This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.

For users that just want to continue their work with minimal
disruption the following should suffice:

Install CMake 3.8.2+

Port any out-of-tree Makefiles to CMake.

Learn the absolute minimum about the new command line interface:

$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..

$ cd build
$ make

PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html

Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Gustavo Lima Chaves ca3d51b5fa build: Only have MMU_BOOT_REGION decl. for HPET if the latter is on
This would impact builds with no CONFIG_HPET_TIMER=y set.

Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
2017-11-07 08:58:49 -05:00
Leandro Pereira adce1d1888 subsys: Add random subsystem
Some "random" drivers are not drivers at all: they just implement the
function `sys_rand32_get()`.  Move those to a random subsystem in
preparation for a reorganization.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-11-01 08:26:29 -04:00
Savinay Dharmappa 58d54c0f2d dts: x86: qemu_x86: Add device support for uart ns16550
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-10-06 08:35:42 -04:00
Savinay Dharmappa ddf6a69577 dts: x86: Add device tree support for qemu_x86
patch add device tree support for ia32 soc and qemu_x86
board port

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2017-10-06 08:35:42 -04:00
Johan Hedberg 2975ca0754 Bluetooth: Kconfig: Rename CONFIG_BLUETOOTH_* to CONFIG_BT_*
The API name space for Bluetooth is bt_* and BT_* so it makes sense to
align the Kconfig name space with this. The additional benefit is that
this also makes the names shorter. It is also in line with what Linux
uses for Bluetooth Kconfig entries.

Some Bluetooth-related Networking Kconfig defines are renamed as well
in order to be consistent, such as NET_L2_BLUETOOTH.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-08-09 11:14:19 +03:00
Andrew Boie 25a8aef275 x86: enable MMU for application memory
Configuring the RAM/ROM regions will be the same for all
x86 targets as this is done with linker symbols.

Peripheral configuration left at the SOC level.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-08-03 11:46:26 -04:00
Andrew Boie 08a9fcdb80 x86: ia32: set access based on linker regions
This will set program text and rodata as read-only even in
non-XIP systems.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-15 12:17:36 -07:00
Andrew Boie 103d655dee qemu_x86: increase to 8MB of RAM
Previously we were instantiating QEMU with 32MB of RAM but
only enabling a small fraction of it.

Now we boot with 8MB of ram. We ignore the first 4K so we can
make that an unmapped paged to catch NULL pointer dereferences.

If XIP is enabled, the "ROM" region will be the first half of
memory, the "RAM" region the latter.

Move the IDT_LIST and MMU_LIST regions elsewhere so they don't
overlap the new memory arrangement.

Use !XIP to fix a problem where CONFIG_RAM_SIZE was set incorrectly
for XIP case.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-10 11:44:56 -07:00
Andrew Boie 2bc0fa9bd5 qemu_x86: ia32: fix ROM size with XIP enabled
The defaults of 0x100000 for ROM and 0x400000 for RAM are intended
to 'fake' a XIP configuration, this all takes place in just RAM.

The gap between these two values is 3 megabytes, specify this
properly.

Fixes numerous test cases on qemu_x86 if CONFIG_XIP is enabled.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-29 07:46:58 -04:00
Adithya Baglody 576c1ebba2 qemu: MMU: Memory regions for qemu_x86
Define the memory regions needed to generate boot time page
tables.

JIRA:ZEP-2098

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-06-13 11:36:54 -04:00
Adithya Baglody 9bbf5335b9 kernel: x86: MMU: Macros & Linker scripts for Boot time table creation
Macro is used to create a structure to specify the boot time
page table configuration. Needed by the gen_mmu.py script to generate
the actual page tables.

Linker script is needed for the following:
     1. To place the MMU page tables at 4KByte boundary.
     2. To keep the configuration structure created by
        the Macro(mentioned above).

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2017-06-13 11:36:54 -04:00
Johan Hedberg 9516d63836 Bluetooth: Remove support for NBLE
NBLE has been deprecated for a few releases now and can be removed.

Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2017-05-25 09:03:16 -07:00
Luiz Augusto von Dentz 0dc022f7fa x86: Increase RAM_SIZE to 256K
When running with qemu often times the developer want to enable all
sorts of debugs which end up not working with only 192K.

Change-Id: I8d784618b9a0d911944f831a4058b34abc0c3e35
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2017-04-11 16:43:22 +03:00
David B. Kinder ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Anas Nashif c1347b4730 kernel: replace all remaining nanokernel occurances
replace include <nanokernel.h> with <kernel.h> everywhere and also fix
any remaining mentions of nanokernel.

Keep the legacy samples/tests as is.

Change-Id: Iac48447bd191e83f21a719c69dc26233216d08dc
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-25 14:34:43 -05:00
Flavio Santes 59c8f32f0f x86/soc: Add ARG_UNUSED macro to avoid compiler warnings
The ARG_UNUSED macro is added to avoid compiler warnings.

Change-Id: If0242548849ee5b258bb3fce9fd727b377411343
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
2016-12-12 20:02:30 +00:00
Andrew Boie 4208976bfc build: consolidate some common parts of linker scripts
There are a number of data sections that are repeated across
all the linker scripts for various architecture. In practice these
don't always get updated and we have had problems with bit-rot.
Consolidate these to make maintenance easier.

x86 linker scripts now follow the same naming convention and we
get rid of a linker-epilog.h that wasn't necessary and whose purpose
has been lost to the mists of time. If applications want to define their
own sections they should be allowed to. Linker scripts for x86 do not
end with .h any more, they are not C header files even though we use
C's preprocessor.

Issue: ZEP-688
Change-Id: I893eb4619969695c1f980efd7c2ec9fa5dad136d
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-10-31 18:00:58 -07:00
Kumar Gala 6102427e5d build: Introduce concept of SoC specific build flags
Introduce a soc-cflags, soc-cxxflags, and soc-aflags as a means for
SoC specific compiler flags to be set without manipulating Kbuild
options directly.

Change-Id: I2c8f5019fb237429e59717ef96bd4251a61dc1a5
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-05-27 10:04:29 -05:00
Andrew Boie ff872dc349 build: rename non-generated linker scripts to .ld extension
Avoids confusion with .gitignore rules, which were inadequate to
cover all the places where these files are found. At least in
VIM, these files are now syntax highlighted correctly.

Change-Id: I23810b0ed34129320cc2760e19ed1a610afe039e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-09 18:09:26 +00:00
Anas Nashif ce836e2c69 toolchain: move iamcu output format/arch to SoC
Instead of defining the output format in the toolchain environment
setup, define this per SoC that supports the ABI.

This will allow us to directly referencing an installed toolchain
without the need for declaring ZEPHYR_GCC_VARIANT

Change-Id: Icd1a7a21acbf075a51854fb2ebb3ef06788ce9b5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-25 17:01:48 +00:00
Johan Hedberg 264c207f4f Bluetooth: Add custom "monitor" protocol logging over UART
With most boards there's no simple way to get access to the HCI
traffic. Simultaneously these boards only have one external UART for
the console. This patch introduces a protocol which combines both
normal logs and HCI logs over a single binary protocol sent over the
console UART.

The protocol is modeled based on the btsnoop/monitor protocols used by
BlueZ, and the first tool that's able to decode this is btmon from
BlueZ ("btmon --tty <tty>").

For platforms with two or more external UARTs it is still possible to
use CONFIG_UART_CONSOLE as long as the UART devices used are
different, however on platforms with a single external UART
UART_CONSOLE should be disabled if BLUETOOTH_DEBUG_MONITOR is enabled
(in this case printk/printf get encoded to the monitor protocol).

Origin: Original
Change-Id: I9d3997c7a06fe48e7decb212b2ac9bd8b8f9b74c
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2016-04-22 18:49:11 +03:00
Andrei Emeltchenko 36748b9f33 ia32: Allow to connect Nordic chip to qemu
Allow to connect Nordic Devkit or dongle to qemu. Simple
configuration for the current NBLE firmware is following:

Connect Nordic board to PC, ttyACMX gets created.
$ socat -x /dev/ttyACMX,raw,b1000000 unix-listen:/tmp/bt-server-bredr
Build app with prj_nble.conf and run with make qemu

Change-Id: I354644b465ad09ab0ca62fbd97f15d9bb3c87d6a
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2016-04-05 11:18:53 +03:00
Daniel Leung 32c6d97922 console/uart: remove duplicate default value for parent UART dev
There is no need to re-define CONFIG_UART_CONSOLE_ON_DEV_NAME to be
"UART_0" all over the place as its default is "UART_0" already.
So remove those duplicate defaults.

Change-Id: Ia86e26b8f90540fdbd7dcb3358d6dac352648b21
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-30 13:38:58 +00:00
Daniel Leung 8f6068e9d8 serial/ns16550: make IRQ triggering condition a SoC decision
The IRQ triggering condition should be specified by SoC as it is
a decision for hardware design. This should not be configurable
in kconfig.

The default is to be triggered on rising edge, just as the same
old kconfig did.

Change-Id: If59d88a30711eb8e03d9cc4f409055cefe1995c5
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-30 13:38:34 +00:00
Daniel Leung 26b474c987 serial/ns16550: reduce number of kconfig options
Moves those kconfig options which should be declared in
SoC or board header files instead. These are the one
that are tied to SoC or board and there is no need
for them to be configurable in kconfig.

Change-Id: I243d634f1a4a11dc8dc3530d95f93371015492b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-30 13:38:34 +00:00
Daniel Leung 546b8ade37 refactor common driver initialization priorities
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.

The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.

This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.

Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.

Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-28 15:58:29 -07:00
Daniel Leung c215ef7213 kconfig: add conditions to device init priority defaults
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.

Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Daniel Leung 8df10d4584 kconfig: untangle ordering and dependencies
There are two major issues with the kconfig:

() Some of the config options have incorrect dependencies inside help
   under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.

() Since the SoC and board specific kconfig files are parsed first,
   the help screen would say, for example, CONFIG_SPI is defined at
   arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
   the actual config is defined in drivers/spi/Kconfig.

These cause great confusion to users of menuconfig/xconfig.

To fix these, the SoC and board defaults are now to be parsed last.

Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.

And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.

Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Daniel Leung 1eddc97b74 arch/x86: hide CPU family Kconfig options
These options should be selected by individual SoC automatically,
and should not be visible options. Or else it would be possible to
select Quark SoCs and telling Kconfig it is from Atom family (which
is incorrect).

Change-Id: I17a6cf713378333e0e7942aa49b381b5eb9526b5
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-16 01:38:07 +00:00
Anas Nashif e65df2562d ia32: compile with soft-float when using IAMCU ABI
When building with IAMCU, make sure we set the soft-float, otherwise
build would fail with unsupported instruction errors.

JIRA: ZEP-103

Change-Id: I7a5f107a2df50799a7f6dd4aba36c1a977c1461d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-03-14 20:54:08 +00:00
Dmitriy Korovkin 41e55f13ad Kconfig: CPU_MIGHT_SUPPORT_CLFLUSH removal.
Remove CPU_MIGHT_SUPPORT_CLFLUSH as excessive.

Removal the flag requires adding per-SoC cnfiguration,
as some Quark models support clflush instruction, but
some do not, even on compiler level.

Change-Id: I655cba00c629db55d1813c199a2fe08b2d60ef4f
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-03-07 20:25:22 +00:00
Daniel Leung e643cede3a uart: add ISR callback mechanism for UART drivers
The peripherals utilizing UART were required to register their own
ISR rountines. This means that all those peripherals drivers need
to know which IRQ line is attached to a UART controller, and all
the other config values required to register a ISR. This causes
scalibility issue as every board and peripherals have to define
those values.

Another reason for this patch is to support virtual serial ports.
Virtual serial ports do not have physical interrupt lines to
attach, and thus would not work.

This patch adds a simple callback mechanism, which calls a function
when UART interrupts are triggered. The low level plumbing still needs
to be done by the peripheral drivers, as these drivers may need to
access low level capability of UART to function correctly. This simply
moves the interrupt setup into the UART drivers themselves. By doing
this, the peripheral drivers do not need to know all the config values
to properly setup the interrupts and attaching the ISR. One drawback
is that this adds to the interrupt latency.

Note that this patch breaks backward compatibility in terms of
setting up interrupt for UART controller. How to use UART is still
the same.

This also addresses the following issues:

() UART driver for Atmel SAM3 currently does not support interrupts.
   So remove the code from vector table. This will be updated when
   there is interrupt support for the driver.
() Corrected some config options for Stellaris UART driver.

This was tested with samples/shell on Arduino 101, and on QEMU
(Cortex-M3 and x86).

Origin: original code
Change-Id: Ib4593d8ccd711f4e97d388c7293205d213be1aec
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-05 13:37:57 +00:00
Ido Yariv 744f4fba3d QEMU: Fix the pin2irq translation function
ia32/soc.h is only used by QEMU, but QEMU's INTx routing does not follow
the "standard design consideration".
Instead, the pins are swizzled based on the PCI slot. They are then
routed to IRQs based on the PIIX PIRQ configuration.

For simplicity use hard-coded values for the PIIX PIRQ configuration,
though it may be desirable in the future to determine these dynamically.

Also change the number of PCI buses to 1 and remove irrelevant comments.

Change-Id: I1592009a43dd8a9c5a7c54788fba52f14687ba35
Signed-off-by: Ido Yariv <ido@wizery.com>
2016-02-26 17:05:30 +00:00
Anas Nashif c4c919dbe0 Move compiler optimization to the SoC
Decisions on compiler optimizations were done on the architecture level,
this does not scale and some SoCs will have different optimization levels
or compiler options needed. Moving this to the SoC makes it easy to optimize
differently when using the same CPU which we use to set the right optimization
now on the architecture level.

For IAMCU platforms, use the right architecture and tuning.

-march=lakemont -mtune=lakemont -miamcu -msoft-float

Change-Id: I458afca5feb9be5de8dcae559d6dcac3c6d6a2a7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:29 -05:00
Ido Yariv 6b6ef8bbb7 QEMU: Add optional PCI support
To debug PCI drivers on QEMU, it may be desired to enable CONFIG_PCI for
QEMU targets. Since the PCI driver requires a SOC pin2irq translation
function, add such function to IA32's SOC header file.

Change-Id: Icf6f88aa14ae29d70fe12dc80a708e6a2e992ba8
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
2016-02-05 20:25:29 -05:00
Andrew Boie 1f63ec7264 Revert "Move compiler optimization to the SoC"
This reverts commit 778d5b11c5327be4b40c7745e9beaecfd6327e13.

This patch has been identified as breaking the build when trying
to manually build non-x86 applications.

Change-Id: I1857745049dfef7193de58737108314b7aae01c5
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:21 -05:00
Anas Nashif b43af743b7 Move compiler optimization to the SoC
Decisions on compiler optimizations were done on the architecture level,
this does not scale and some SoCs will have different optimization levels
or compiler options needed. Moving this to the SoC makes it easy to optimize
differently when using the same CPU which we use to set the right optimization
now on the architecture level.

For IAMCU platforms, use the right architecture and tuning.

-march=lakemont -mtune=lakemont -miamcu -msoft-float

Change-Id: I0f77cffe7a139f8b2620935094437d0dfd160dfe
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:17 -05:00
Anas Nashif fad531027b kbuild: move SoC Makefile content to Kbuild file
The Kbuild system first looks for a Kbuild file, then it looks for
a make file.
Use the Kbuild for object building and leave the Makefile for definding
build options and compiler flags and other SoC related defines.

Change-Id: I0be59bb5ae02a29108a188efbd6f14dcdb7de4ee
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:17 -05:00
Anas Nashif 10bb38c186 Use SoC instead of platform.
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.

Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:11 -05:00