Commit Graph

34 Commits

Author SHA1 Message Date
Anas Nashif d687a95611 kernel: move kernel code to kernel/ directly
Also remove mentions of unified kernel in various places in the kernel,
samples and documentation.

Change-Id: Ice43bc73badbe7e14bae40fd6f2a302f6528a77d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-12-19 14:59:35 -05:00
Benjamin Walsh f6ca7de09c kernel/arch: consolidate tTCS and TNANO definitions
There was a lot of duplication between architectures for the definition
of threads and the "nanokernel" guts. These have been consolidated.

Now, a common file kernel/unified/include/kernel_structs.h holds the
common definitions. Architectures provide two files to complement it:
kernel_arch_data.h and kernel_arch_func.h. The first one contains at
least the struct _thread_arch and struct _kernel_arch data structures,
as well as the struct _callee_saved and struct _caller_saved register
layouts. The second file contains anything that needs what is provided
by the common stuff in kernel_structs.h. Those two files are only meant
to be included in kernel_structs.h in very specific locations.

The thread data structure has been separated into three major parts:
common struct _thread_base and struct k_thread, and arch-specific struct
_thread_arch. The first and third ones are included in the second.

The struct s_NANO data structure has been split into two: common struct
_kernel and arch-specific struct _kernel_arch. The latter is included in
the former.

Offsets files have also changed: nano_offsets.h has been renamed
kernel_offsets.h and is still included by the arch-specific offsets.c.
Also, since the thread and kernel data structures are now made of
sub-structures, offsets have to be added to make up the full offset.
Some of these additions have been consolidated in shorter symbols,
available from kernel/unified/include/offsets_short.h, which includes an
arch-specific offsets_arch_short.h. Most of the code include
offsets_short.h now instead of offsets.h.

Change-Id: I084645cb7e6db8db69aeaaf162963fe157045d5a
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-12 07:04:52 -05:00
Andrew Boie 6e172b8abd x86: remove legacy kernel support
Change-Id: I81111a58d1305bd521ea93adc40c66b43f20977c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-11-04 11:45:13 -07:00
Benjamin Walsh 983cbe398c unified/x86: add unified kernel support for x86 arch
The x86 architecture port is fitted with support for the unified kernel,
namely:

- the interrupt exit code now calls _Swap() if the current
  thread is not a coop thread and if the scheduler is not locked

- there is no 'task' fields in the _nanokernel anymore: _Swap()
  now calls _get_next_ready_thread instead

- the _nanokernel.fiber field is replaced by a more sophisticated
  ready_q, based on the microkernel's priority-bitmap-based one

- nano_private includes nano_internal.h from the unified directory

- the FIBER, TASK and PREEMPTIBLE flags do not exist anymore: the thread
  priority drives the behaviour

- the tcs uses a dlist for queuing in both ready and wait queues instead
  of a custom singly-linked list

- other new fields in the tcs include a schedule-lock count, a
  back-pointer to init data (when the task is static) and a pointer to
  swap data, needed when a thread pending on _Swap() must be passed more
  then just one value (e.g. k_stack_pop() needs an error code and data)

- fiberRtnValueSet() is aliased to _set_thread_return_value since it
  also operates on preempt threads now

- _set_thread_return_value_with_data() sets the swap_data field in
  addition to a return value from _Swap()

- convenience aliases are created for shorter names:

  - _current is defined as _nanokernel.current
  - _ready_q is defined as _nanokernel.ready_q

- _Swap() sets the threads's return code to -EAGAIN before swapping out
  to prevent timeouts to have to set it (solves hard issues in some
  kernel objects).

- Floating point support.

Note that, in _Swap(), the register holding the thread to be swapped in has
been changed from %ecx to %eax in both the legacy kernel and the unified kernel
to take advantage of the fact that the return value of _get_next_ready_thread()
is stored in %eax, and this avoids moving it to %ecx.

Work by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
         Allan Stephens <allan.stephens@windriver.com>
	 Benjamin Walsh <benjamin.walsh@windriver.com>

Change-Id: I4ce2bd47bcdc62034c669b5e889fc0f29480c43b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-09-13 17:12:55 -04:00
Andrew Boie c545e19a00 x86: remove dynamic interrupts and exceptions
Change-Id: I7e9756e9a0735a7d8257ee2142d5759e883e12cc
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-09-06 18:35:24 +00:00
Andrew Boie 17c0b372a2 x86: improve exception APIs
Previously, exception stubs had to be declared in assembly
language files. Now we have two new APIs to regsiter exception
handlers at C toplevel:

 _EXCEPTION_CONNECT_CODE(handler, vector)
 _EXCEPTION_CONNECT_NOCODE(handler, vector)

For x86 exceptions that do and do not push error codes onto
the stack respectively.

In addition, it's now no longer necessary to #define around
exception registration. We now use .gnu.linkonce magic such that
the first _EXCEPTION_CONNECT_*() that the linker finds is used
for the specified vector. Applications are free to install their
own exception handlers which will take precedence over default
handlers such as installed by arch/x86/core/fatal.c

Some Makefiles have been adjusted so that the default exception
handlers in arch/x86/core/fatal.c are linked last. The code has
been tested that the right order of precedence is taken for
exceptions overridden in the floating point, gdb debug, or
application code. The asm SYS_NANO_CPU_EXC_CONNECT API has been
removed; it was ill- conceived as it only worked for exceptions
that didn't push error codes. All the asm NANO_CPU_EXC_CONNECT_*
APIs are gone as well in favor of the new _EXCEPTION_CONNNECT_*()
APIs.

CONFIG_EXCEPTION_DEBUG no longer needs to be disabled for test
cases that define their own exception handlers.

Issue: ZEP-203
Change-Id: I782e0143fba832d18cdf4daaa7e47820595fe041
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-28 18:13:24 +00:00
Andrew Boie 6a1474e75b nanokernel: support GCC compiler atomic builtins
Arches now select whether they want to use the GCC built-ins,
their own assembly implementation, or the generic C code.

At the moment, the SDK compilers only support builtins for ARM
and X86. ZEP-557 opened to investigate further.

Change-Id: I53e411b4967d87f737338379bd482bd653f19422
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-18 23:20:52 +00:00
Andrew Boie 8c524a291e x86: merge IAMCU and SYS V core arch code
Having two parallel implementations is a maintenance issue, especially
when some strategically placed #ifdefs will suffice.

We prefer the ASM versions for SYS V, as we need complete control of
the emitted assembly for interrupt handling and context switching.
The SYS V code is far more mature. IAMCU C code has known issues with
-fomit-frame-pointer.

The only difference between the two calling conventions is that the
first three function arguments are provided in eax, edx, ecx instead
of on the stack.

Issue: ZEP-49
Change-Id: I9245e4b0ffbeb6d890a4f08bc8a3a49faa6d8e7b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-13 17:56:39 +00:00
Andrew Boie 68b3b6135e errno: implement _get_errno() in common code
We really should have more faith in the compiler, it generates
code to implement this exactly like the arch-specific assembly
versions, and on ARM is actually 4 bytes shorter.

FUNC_NO_FP used to disable the usual C preamble to update the
frame/stack pointers, which is how the sizes are still the same
or less. It's debatable how useful the occasional use of
FUNC_NO_FP is in practice since it hinders debugging and in a
production build frame pointers should be globally disabled, but
we can address that later.

Change-Id: I6c4b64ab3e3a9b6f91d52fa8c92e6e79a986fc77
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-04 17:04:14 +00:00
Juan Manuel Cruz 2170ca79ff build: support icx llvm compiler
Change-Id: I0bcc1f2e0ea93830e61fb3eaf8b523b7c4e1c301
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
2016-05-03 00:02:40 +00:00
Benjamin Walsh f703f7d0f6 debug: add target GDB server
The GDB server implements a set of GDB commands, such as read/write
memory, read/write registers, connect/detach, breakpoints, single-step,
continue. It is not OS-aware, and thus provides a 'system-level'
debugging environment, where the system stops when debugging (such as
handling a breakpoint or single-stepping).

It currently only works over a serial line, taking over the
uart_console. If target code prints over the console, the GDB server
intecepts them and does not send the characters directly over the serial
line, but rather wraps them in a packet handled by the GDB client.

Change-Id: Ic4b82e81b5a575831c01af7b476767234fbf74f7
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-04-16 05:29:22 +00:00
Benjamin Walsh fd1aa8575b x86: move reboot via RST_CNT from galileo to generic x86
That implementation is not galileo-specific, but rather a generic way of
rebooting an x86 target. Needs SoC support.

Change-Id: I9c3374a8ab57a624d9d9b7090260c5b11fe4e773
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-25 16:52:27 +00:00
Andrew Boie f0a1d22f28 x86: leave the GDT in ROM by default
We don't normally need a runtime-mutable GDT; make it optional to
activate a second copy in RAM. Regardless of whether it is in RAM
or ROM, it can be accessed by the '_gdt' symbol.

Change-Id: I5ce955f4b8875eb60040917ceaacc07d7e5941ac
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:28 -05:00
Andrew Boie d9cfbd5a61 interrupts: new static IRQ API
The interrupt API has been redesigned:

- irq_connect() for dynamic interrupts renamed to irq_connect_dynamic().
  It will be used in situations where the new static irq_connect()
  won't work, i.e. the value of arguments can't be computed at build time
- a new API for static interrupts replaces irq_connect(). it is used
  exactly the same way as its dynamic counterpart. The old static irq
  macros will be removed
- Separate stub assembly files are no longer needed as the stubs are now
  generated inline with irq_connect()

ReST documentation updated for the changed API. Some detail about the
IDT in ROM added, and an oblique reference to the internal-only
_irq_handler_set() API removed; we don't talk about internal APIs in
the official documentation.

Change-Id: I280519993da0e0fe671eb537a876f67de33d3cd4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:25:17 -05:00
Dirk Brandewie d8a1c8ef17 x86: iamcu: Add support for the IAMCU calling convention.
Add support for compilers conforming to the IAMCU calling convention
as documented by
https://github.com/hjl-tools/x86-psABI/wiki/iamcu-psABI-0.7.pdf


Change-Id: I6fd9d5bede0538b2049772e3850a5940c5dd911e
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:25:06 -05:00
Dirk Brandewie fa2441534a x86: kernel move excstub.S back to core
excecptions are handled the same for i386_sysV_abi and iamcu calling
conventions ATM since we do not have any exceptions that we can
recover from there is no reason to have seperate implementations.

Change-Id: Ica8b332d7756a91b56f7080ac74771ad25d32753
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
2016-02-05 20:25:04 -05:00
Benjamin Walsh 3181df6db4 kernel: add per-thread errno support
Saves an errno per-thread, retrieved via _get_errno(), instead of
changing the value of a global variable during context switches to avoid
a hit to the context switch performance.

Per-arch asm implementations are provided for maximum performance.

Enabled by default, but can be disabled via the CONFIG_ERRNO option.

Change-Id: I81d57a2e318c94c68eee913ae0d4ca3a3609c7a4
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:58 -05:00
Andrew Boie 4d7181b762 x86: move intconnect.c
Although it contains functions called from ASM-land, there's no
calling-convention specific code here.

Change-Id: I3d912bdf28e6f3e797e6a2d6b745302b4c884b4a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:57 -05:00
Andrew Boie bba9510319 irq_offload: API to run a function in IRQ context
Software interrupts or system calls aren't really appropriate for
zephyr, but we have an ongoing need in our test code to run a
function with arguments synchronously in interrupt context.

This patch introduces irq_offload() which allows us to do this without
separate initialization or having to manage fake IRQs in the
interrupt controller.

ARM assembly code contributed by Benjamin Walsh
<benjamin.walsh@windriver.com>

ARC is not yet implemented but will be in a subsequent patch.

irq_test_common.h has been removed and all test cases updated to
use the new API.

Change-Id: I9af99ed31b62bc7eb340e32cf65e3d11354d1ec7
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:55 -05:00
Benjamin Walsh ba31ab92a3 x86: refactor assembly flags in Makefiles
Add comment regarding the use of GAS when using clang, and remove
duplication of setting -Wa,--divide, which is needed for all toolchains.

Change-Id: Iab7257b038d1f4142c37a6c6c5979ef28f78a655
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:53 -05:00
Benjamin Walsh 4c57acb883 x86: split ABI related files
Move the files that *know* about the calling convention in use by the
compiler. The routines exposed by the files moved to the i386_sysV_abi
directory follow the C calling convention specified by the
i386_sysV_abi which is the default for GCC. The upstream GCC has been
enhanced to support the iamcu_ABI that is optimized for processors
that implement the IA MCU instruction set. This new ABI provides code,
data and stack size improvements on IA MCU based systems.

This change is the first step in adding support for the IA MCU
optimized toolchains to Zephyr OS

Change-Id: I13bffee8007fb3f82aa31389b2c241065e8e315d
Original-work-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:53 -05:00
Anas Nashif db26a98c93 Fixed various clang build issues
Fix a few spots where building with with clang fails.

Change-Id: I621c7cb8daf119bf89ad512168d70e1c9b67e53f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:47 -05:00
Andrew Boie 30f01d86e0 x86: remove CONFIG_LOCK_INSTRUCTION_UNSUPPORTED
This was only needed on legacy platforms which are no longer
supported.

Change-Id: I4a3312f3698c4fc8bbf0df4610af7b69a9056f80
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:42 -05:00
Andrew Boie 8a2104e16a x86: remove CONFIG_UNALIGNED_WRITE_UNSUPPORTED
This had bit-rotted to the point where it was breaking the build
and was only needed on legacy platforms that are no longer
supported.

Change-Id: I4fcfc38bacac58761fba475701e0c27d7b8b7a27
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:42 -05:00
Andrew Boie b43758d22a x86: remove dynamically generated IRQ and exception code
We are interested in supporting some XIP x86 platforms which are
unable to fetch CPU instructions from system RAM. This requires
refactoring our dynamic IRQ/exc code which currently synthesizes
assembly language instructions to create IRQ stubs on-the-fly.

Instead, a new approach is taken. Given that the configuration at
build time specifies the number of required stubs, use this
to generate a build time a set of tiny stub functions which simply
push a 'stub id' and then call common dynamic interrupt code.
The handler function and handler argument is saved in a table keyed by
this stub id.

CONFIG_EOI_HANDLER_SUPPORTED removed, the code hasn't been conditionally
compiled for some time and in all cases we call _loapic_eoi() when
finished with an interrupt.

Some other out-of-date verbiage in comments related to supporting
non-APIC removed.

Previously, when dynamic exceptions were created a pointer would
be passed in by the caller reserving ram for the stub code. Since
this is no longer feasible, two new Kconfig options have been added.
CONFIG_NUM_DYNAMIC_EXC_STUBS and CONFIG_NUM_DYNAMIC_EXC_NO_ERR_STUBS
control how many stubs are created for exceptions that push
an error code, and no error code, respectively.

SW Interrupts are no longer triggered by "int <vector>" hard-coded
assembly instructions. Instead this is done by sending a self-directed
inter-processor interrupt from the LOAPIC, using a new API
loapic_int_vect_trigger(). In this way we get rid of dynamically
generated code in irq_test_common.h.

All interrupts call _loapic_eoi() when finished, since this is now
the right thing to do for all IRQs, including SW interrupts.

_irq_handler_set() for x86 no longer requires the old function pointer
to be supplied.

Change-Id: I78993d3d00dd153c9051c518b417cce8d3acee9e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:41 -05:00
Andrew Boie 090385b666 x86: remove boi handler support, eoi argument
This was only needed for the older 8259A style PICs which are no
longer supported.

Since we now just support APIC, we always just call loapic_eoi which
no longer requires an argument and informs the IOAPIC that the interrupt
is complete if necessary.

Change-Id: I15c9b7b4f03b872656220af32220b62e043bfa6b
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-02-05 20:24:35 -05:00
Anas Nashif 3206f0b231 kbuild: remove unnecessary if statements
The c files actually check for the Kconfig variables, so there is no 
need to do the checking in the Makefile again adding double logic.


Change-Id: I8521047bd575c8f9d64f7d8e5abfb5eee8a40cb3
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:17 -05:00
Benjamin Walsh e80d06deed arch: rename context.c files to thread.
Also for ARC, rename context_wrapper.S to thread_entry_wrapper.S.

Change-Id: I83318ae352a688996f8436cf3252f6108ec23dc5
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:27 -05:00
Benjamin Walsh 910970ed0f ffs: remove non-inline find_[first|last]_set()
The inline versions are renamed to remove the _inline suffix, and the
non-inline versions are removed from the code base.

Change-Id: Iee2e6adcfb5da1fe0a978a05aa854e10ae82a8b8
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:15:25 -05:00
Peter Mitsis 96726f0a58 x86: Move source files from arch/x86/ to arch/x86/core/
Moves the source files from arch/x86/ to arch/x86/core/ as part of transforming
BSPs to platforms.

Change-Id: I0ef6622762cda8ce201944fd87f2ee8f73e3e511
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:41 -05:00
Peter Mitsis 29092fe935 arch/x86: Move sys_fatal_error_handler.c to 'core'
One of many steps in the transforming BSPs to platforms work item.  At the end
of this work item, there should not be any code in the 'arch/x86' directory.

Change-Id: I78bf1738f4450faa078a8510ab342eb9d9277b91
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:37 -05:00
Allan Stephens 35cf49d479 Standardize naming of nanokernel core source files for x86
Gets rid of "nano" prefix on these nanokernel files.

Change-Id: Ib87323b14779bf3673ec2826023eb94b4b7cc81e
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
2016-02-05 20:14:26 -05:00
Anas Nashif bbe84f8ae5 Use ccflags-y and asflags-y instead of EXTRA_CFLAGS
According to section 3.7 of Documentation/kbuild/makefiles.txt, using
EXTRA_CFLAGS in Makefiles is "still supported but their usage is
deprecated." However, using make EXTRA_CFLAGS="-DSOMETHING" results in
EXTRA_CFLAGS from Makefiles being overwritten, obviously breaking the
build.  This patch converts to them to the newer ccflags-y which also
fixes the problem.

Change-Id: I6309439599d4c9cc184f9ecd941bde841982ef07
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:14 -05:00
Juan Manuel Cruz 1c233a0377 Creation of Makefiles for arch directory.
This commit creates all the Makefiles that describe the object-
bundles for the arch directory and  every sub-directory below.

Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@linux.intel.com>
Change-Id: Icb4ebcfc430a132e514507149ad5ab6878eeed64
2016-02-05 20:14:04 -05:00