2 Commits

Author	SHA1	Message	Date
Anas Nashif	35910040f1	boards: it8xxx2_evb: set architecture correctly ... riscv -> riscv32 Signed-off-by: Anas Nashif <anas.nashif@intel.com>	2021-03-04 07:14:11 -06:00
Cheryl Su	968dd2107b	boards/riscv: add new riscv platform-it8xxx2 ... We create a new platform for our chip series it8xxx2. It is a riscv base soc. Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>	2020-12-16 08:47:36 -05:00