Commit Graph

6 Commits

Author SHA1 Message Date
Tomasz Bursztyka 553cee8aea spi: galileo: Pre-configure SPI ports present on Galileo board
Providing the right settings through Galileo's Kconfig.

Change-Id: Ia5339eb90cb98d7dde3be0493bcfd9a6b6db60ed
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:22 -05:00
Tomasz Bursztyka 3f5083e9f6 spi: ia32_pci: galileo: Add options to allow SPI IRQ trigger
Add Kconfig option to specify how interrupt is triggered for SPI.
Also enabling such support for Galileo platform.

Change-Id: Id3112d100089197940f826b827493174d0f22669
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:22 -05:00
Tomasz Bursztyka 4cace6d2d7 spi: Add the CS pin control over GPIO for intel spi port 0
This is specific to Galileo board where its SPI port 0 needs to setup
the CS pin through a GPIO pin.

Change-Id: I9df6f7144a96bcd10f61fc7d057f89caa0e599d1
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:24:22 -05:00
Tomasz Bursztyka e4479cd0cf spi: Handle the support for PCI_ENUMERATION
Without it, it won't go through a pci scan, and will just trust the
pre-set information for the bus/dev/function to enable the memory
mapped registers.

Change-Id: Ica9156be541619dce9684dd45f70e05b69782a7c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2016-02-05 20:15:32 -05:00
Tomasz Bursztyka d96943b04c spi: Add support for Intel's SPI controller
Such controllers are found in Quark's X1000 series, and thus are found
on Galileo boards v1 and v2.

Change-Id: Ib71486c9f27de1b6c48ce3cb3dd138d69833c2ea
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:28 -05:00
Tomasz Bursztyka d5d525562e drivers: Add the common directory and files for SPI
Add the necessary Kconfig, Makefile etc...

Change-Id: I3682ab353ef71f3827520ab3fc4b16a122180d99
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:28 -05:00