We're using SPDX tags for Apache 2.0 licensing instead of the
Apache 2.0 boilerplate comment block.
Change-Id: I9e56f918ab4ed4d127dbe64538c9fa62886386a8
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This patch changes Quark SE power drivers to support multicore scenarios
e.g. both LMT and ARC core are enabled and manage power.
Handling LPS states in multicore scenarios are dead simple because LPS
states are core-specific states. It means that putting the LMT core in
LPS doesn't affect the ARC core, and vice-versa. DEEP_SLEEP state, on
the other hand, affects both cores since it turns power off from the SoC
and both cores are shutdown. It means that if LMT puts the system in
DEEP_SLEEP, ARC core is shutdown even if it is busy handling some task.
In order to support the multicore scenario, this patch introduces the
SYS_POWER_STATE_DEEP_SLEEP_2 state to both ARC and x86 power drivers.
On ARC, this state works as following:
1) Save ARC execution context;
2) Raise a flag to inform the x86 core that ARC is ready to enter in
DEEP_SLEEP;
3) Enter in the lowest core-specific power state, which in this case is
LPSS.
On x86, DEEP_SLEEP_2 is very similar to DEEP_SLEEP. The difference relies
in the post_ops() which calls _arc_init() in order to start ARC core so
it can restore its context.
This patch also adds the test/power/multicore/ directory which provides
sample application to x86 and ARC cores in order to easily verify the
multicore support. In test/power/multicore/README.rst you can find more
details regarding the applications.
Jira: ZEP-1103
Change-Id: Ie28ba6d193ea0e58fca69d38f8d3c38ca259a9ef
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Remove legacy option and use SYS_CLOCK_EXISTS where appropriate.
Change-Id: I3d524ea2776e638683f0196c0cc342359d5d810f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
To customise test builds and support test related features such as time
stamps and a boot banner, introduce a Makefile variant that is dedicated
to testing.
Initially we introduce a new config overlay that is used for all tests, in
this case we enable BOOT_BANNER and BUILD_TIMESTAMP. This will print the
current version and the date, useful when reporting bugs and also an
indicator that the system has booted before the test has started.
For example:
[QEMU] CPU: qemu32
***** BOOTING ZEPHYR OS v1.6.99 - BUILD: Dec 21 2016 19:57:13 *****
tc_start() - Test Nanokernel CPU and thread routines
Initializing nanokernel objects
...
..
Change-Id: I224318cdeb55a301964ea366dbc577e2e3a09175
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When going into DEEP_SLEEP mode, the ARC core now saves
its context. This includes:
- All core registers
- Stack pointer
- Program counter (restored by jumping to the restore code)
The arc reset code now checks if the GPS0 bit 2 is set.
This is similar to the behavior of the x86 core done by
the QMSI bootloader which is setting GPS0 bit 1 in order
to call the restore path instead of cold boot path.
The sample has been adapted in order to support the ARC.
Jira: ZEP-1222
Change-Id: I375f03b16b8a5fd1f07ead55cf7e4947d6290c9f
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
The app passes the index into an array storing power states
instead of the power state to _sys_soc_power_state_post_ops
Jira: ZEP-1341
Change-Id: I6ddf0a2dbadfd06aafbcafa88be7441e99694a51
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Coverity detected some constant value in the vars, due to the
exclusive config select in the code.
Change-Id: Id27b658f3cd70dce626fef054457a9c726b3b957
CID: 151974, 151972 and 151971
Signed-off-by: Javier B Perez <javier.b.perez.hernandez@intel.com>
testcase.ini was not building for ARC. This app would
run on x86 and arc.
Change-Id: I961d56079aa1db7d84e0fcc87780ba11d7f4d831
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
tests: power_states app updated to support SoCWatch collection
Add CONFIG_SOC_WATCH option for enabling the SoCWatch
QMSI driver and associated instrumentation hooks.
Bug fix for soc_watch.c to use local irq_lock/unlock
This will be put into QMSI as well.
JIRA: ZEP-1121
Change-Id: I0514324e81ca02c1d01ffc2d6cf4d31aee491544
Signed-off-by: Jon Moeller <jon.moeller@intel.com>
The API to disable _sys_soc_resume notification is currently
called _sys_soc_disable_wake_event_notification. This is
misleading because it is possible that the ISR from which
_sys_soc_resume is called could be from a different interrupt
with higher priority that happened before interrupts were
enabled. More accurately, it is a notification of exit from
kernel idling after pm operations.
Jira: ZEP-1271
Change-Id: I83747f2cacac1bc17f135d12f4aa4478970fc02d
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Add Low Power States support to the power shim layer
and show the usage in the quark_se sample.
States are defined as follow:
- SYS_POWER_STATE_CPU_LPS: SS2 with LPSS enabled
- SYS_POWER_STATE_CPU_LPS_1: SS2 with LPSS disabled
- SYS_POWER_STATE_CPU_LPS_2: SS1 with LPSS disabled
Jira: ZEP-994
Change-Id: Ie4b93f6e539cb53fc035be00280b66b2cb0d9fea
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
Remove those from Makefiles and testcase.ini, we now support unified kernel
only and sanitycheck script now knows how to deal with this.
Change-Id: I853ebcadfa7b56a4de5737d95f2ba096babb2e13
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Port the power management test app to use unified kernel.
Change-Id: I2f10748be5ca7d9792f6e97c35f5f2aabab769e7
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
QMSI 1.3 natively supports restoring the SoC and peripherals
after sleep.
The Zephyr Power Management shim layer is updated
in order to support QMSI functions.
The following functions have been added:
void _sys_soc_set_power_state(enum power_state);
void _sys_soc_power_state_post_ops(void);
In order to fully support deep sleep, the function
_sys_soc_set_power_state now support saving and
restoring CPU context and returns to the application.
_sys_soc_set_power_state function also abstracts
QMSI cpu states and enable the application to choose
between C1/C2 or C2LP states.
The QMSI power states are mapped as follows:
SYS_SOC_POWER_STATE_CPU_LPS -> power_cpu_c2lp
SYS_SOC_POWER_STATE_CPU_LPS_1 -> power_cpu_c2
SYS_SOC_POWER_STATE_CPU_LPS_2 -> power_cpu_c1
SYS_SOC_POWER_STATE_DEEP_SLEEP -> power_soc_deep_sleep
SYS_SOC_POWER_STATE_DEEP_SLEEP_1 -> power_soc_sleep
The following functions have been removed:
void _sys_soc_set_power_policy(uint32_t pm_policy);
int _sys_soc_get_power_policy(void);
FUNC_NORETURN void _sys_soc_put_deep_sleep(void);
void _sys_soc_put_low_power_state(void);
void _sys_soc_deep_sleep_post_ops(void);
Those changes are propagated to the samples.
All calls to QMSI are removed.
Jira: ZEP-1045, ZEP-993, ZEP-1047
Change-Id: I26822727985b63be0a310cc3590a3e71b8e72c8c
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
David B. Kinder