Commit Graph

9 Commits

Author SHA1 Message Date
David B. Kinder ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Anas Nashif 5363d14a9e boards: rename Quark SE Devboard to Quark SE C1000
This board now has an official name and will be available soon:

http://www.intel.com/content/www/us/en/embedded/products/quark/mcu/se-soc/overview.html

Jira: ZEP-758
Change-Id: Ia16d33722308cf81471321c3063bdc75055a4d50
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-09-16 03:10:31 +00:00
Kumar Gala 9ec2f3be80 Cleanup whitespace in Kconfig files
Convert leading whitespace into tabs in Kconfig files.  Also replaced
double spaces between config and <prompt>.

Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-05-25 13:28:07 -05:00
Chuck Jordan 7f637af2bd spi: For spi_dw, added SPI_DW_FIFO_DEPTH as configurable paramter
When using the Synopsys DesignWare Synchronous Serial Interface (SSI),
the FIFO depth can vary from 2-256, depending upon how this module is built.
For quark_se_ss, it was using a depth of 8. For EM Starterkit, it will be
32. Adding this now as a configurable option. A larger FIFO really helps
reduce SPI interrupts.

Change-Id: Id2bc8470bfc08ab447d38b89c7904cff010c63bd
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
2016-05-19 01:24:57 +00:00
Anas Nashif fbe7d90ead spi: consalidate and simplify
Use the same Kconfig infrastructure and options for all SPI drivers.

Jira: ZEP-294
Change-Id: I7097bf3d2e1040fcec166761a9342bff707de4dd
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-05-12 10:57:26 +00:00
Anas Nashif a2b9b4b71a spi: remove kconfig variables that can be define in headers
Most of the values are SoC specific and come from the SoC definition,
not need to define them in Kconfig.

Jira: ZEP-294
Change-Id: I962ce36b7e2361ea77ae4178bb7c86c19a241c4e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-05-12 10:57:26 +00:00
Anas Nashif b46f9db04b spi: use global init priority
Do not have priority per IP, use one config instead.

Change-Id: Ieb2923d4749a294e2a1c677d47d56a14cee3f36d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:46:29 -04:00
Daniel Leung 546b8ade37 refactor common driver initialization priorities
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.

The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.

This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.

Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.

Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-28 15:58:29 -07:00
Daniel Leung a33aecc611 spi: restructure kconfig options
() Moves config options for each controllers into their own
   Kconfig files. This keeps upper level Kconfig from getting
   too big.
() Options for each controller are moved under their own
   submenus.

Origin: refactored from existing file
Change-Id: I813694f26126b43523b08ebdb0a5383edd241cda
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-17 21:05:12 +00:00