The code fragment to bind the instances of the SPI driveri is not
platform specific but is driver specific.
All the information required to bind a driver instance comes from
CONFIG_ variables. Having the binding code with the driver code
avoids duplicating the code fragments in each platform where the
driver may be used.
Change-Id: Iff40227e3e25d431ae870d585445971f35d934dd
Signed-off-by: Dirk Brandewie <dirk.j.brandewie@intel.com>
Or then the controller will spin around requesting to get its fifo
filled-in though it's unnecessary.
Change-Id: I81e7c483345236dee7691c3e780b1b06d6b2d0f8
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
- Handle the new error callback type, a ROR interrupt is irrecoverable.
- Removing the fifo pre-fill: this should never be done that way. It's
up to the controller to request via an interrupt to get its fifo
filled-in. (TFS bit on SSSR register is the one requesting such
filling)
- Disabling the controller once completed (following transfer will
re-enable it)
- Removing useless debugging info
Change-Id: I466a8efb65a41f3315a6a36e10ea519d0c4b01e9
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Without it, it won't go through a pci scan, and will just trust the
pre-set information for the bus/dev/function to enable the memory
mapped registers.
Change-Id: Ica9156be541619dce9684dd45f70e05b69782a7c
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will make code that use it not too crowded with #ifdef #endif
Change-Id: Iec0fa662445b1cefdc7c64d9483e1ae483106a90
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Such controllers are found in Quark's X1000 series, and thus are found
on Galileo boards v1 and v2.
Change-Id: Ib71486c9f27de1b6c48ce3cb3dd138d69833c2ea
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Dirk Brandewie