Commit Graph

47991 Commits

Author SHA1 Message Date
Maureen Helm 7ae122dce0 boards: arm: Configure FlexSPI QSPI flash on mimxrt1064_evk
Enables the FlexSPI NOR flash driver, configures the FlexSPI pins, and
updates the board documentation accordingly on the mimxrt1064_evk.

Note that this SoC has two FlexSPI instances: one instance has an
in-package QSPI flash used for XIP; the other instance has a board-level
QSPI flash used for storage, not XIP. This patch enables the flash
driver on the non-XIP flash only.

Tested with:
  - samples/subsys/fs/littlefs
  - samples/drivers/flash_shell

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>

boards: arm: Rename flexspi_qspi to flexspi_nor for mimxrt1064_evk

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm c489cf99e2 soc: arm: Enable FlexSPI flash driver on i.MX RT family
Enables the FlexSPI flash driver on the i.MX RT SoC family and
configures the peripheral clocks accordingly. We are careful to only
configure the peripheral clocks if we are not executing in place from
the FlexSPI flash.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm b0bd5a6ece drivers: flash: Introduce i.MX RT FlexSPI driver
Introduces a new flash driver for the FlexSPI peripheral on i.MX RT
SoCs. The hardware provides a flexible sequence engine (LUT) that
supports various types of external devices, including serial NOR flash,
serial NAND flash, HyperBus (HyperFlash/HyperRAM), and FPGAs. It
supports up to four connected devices in single/dual/quad/octal modes
and provides memory-mapped read/write access to these devices through
the AHB bus.

The driver implementation consists of a shared controller for each
FlexSPI peripheral instance, and protocol-specific device drivers for
each external device. The controller provides a private interface for
multiple devices to access the FlexSPI peripheral registers. FlexSPI
devices provide the public flash driver interface to applications or
subsystems like storage or flash file systems; they also provide
protocol-specific LUT sequences to the controller.

Currently the only device type supported is QSPI NOR flash, but other
types like HyperFlash will be added later.

XIP is not yet supported, as this requires additional work to relocate
code to RAM and managing interrupts.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm 52b77ac956 dts: boards: arm: Rework FlexSPI bindings on i.MX RT boards
Reworks the NXP FlexSPI device tree bindings to configure controller and
device properties needed for an upcoming FlexSPI flash driver.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm 17ce756ce3 boards: arm: Clean up HyperFlash dts nodes on mimxrt10{50,60}_evk
Cleans up the HyperFlash device tree nodes on the mimxrt1050_evk and
mimxrt1060_evk_hyperflash boards to be more consistent with other
FlexSPI child nodes.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm f3a64b037e boards: arm: Add qspi flash dts node to mimxrt1064_evk
Copies the QSPI flash device tree node from the mimxrt1060_evk to the
mimxrt1064_evk board.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Maureen Helm 1883c85abd modules: nxp_imx: Add HAS_MCUX_FLEXSPI
Adds a hidden config symbol HAS_MCUX_FLEXSPI selected by NXP SoCs when
the FlexSPI peripheral is present. It will be used as a dependency for a
new FlexSPI flash driver to prevent users from accidentally enabling the
driver on platforms that don't have the necessary hardware.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2021-01-22 11:11:54 -05:00
Daniel Leung 4e8abfcba7 x86: use TSC for timing information
This changes the timing functions to use TSC to gather
timing information instead of using the timer for
scheduling as it provides higher resolution for timing
information.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2021-01-22 11:05:30 -05:00
Mattias Säteri cf4295d106 native_posix: Add flags to fs_open invocation
Added flags that were missing from fs_open() call.

Signed-off-by: Mattias Säteri <mattias.sateri@flir.com>
2021-01-22 10:37:57 -05:00
Nicolas Pitre a2011d8af9 z_heap_aligned_alloc(): avoid memory wastage
The strategy used in z_heap_aligned_alloc() was to allocate an extra
align-sized memory block for storing a pointer to the memory heap.
This is wasteful in terms of memory usage when alignment is larger
than a pointer width. A loop is needed to find the initial memory
start when freeing it which isn't optimal either.

Instead, let's have sys_heap_aligned_alloc() rewind a pointer after
it is aligned to make just enough room for storing our heap reference.
This way the heap reference is always located immediately before the
aligned memory and any unused memory is returned to the heap.

The rewind and alignment values may coincide in which case only
the alignment is necessary anyway.

Signed-off-by: Nicolas Pitre <npitre@baylibre.com>
2021-01-22 10:04:43 -05:00
Xavier Chapron 47da2bed27 drivers: modem: sara-r4: Add sanity timeout for @ prompt
This wait on @ prompt was added in
fa3d586483.
The situation were the @ prompt is never received should not occurs,
however it's definitively safer to catch it instead of having a
deadlock.

Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
2021-01-22 10:04:11 -05:00
Piotr Pryga 609701fa21 Bluetooth: controller: radio: Fix compilation error
Fix compilation error caused by use of wrong header file:
nrfx/hal/nrf_radio.h instead of hal/nrf_radio.h.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2021-01-22 09:49:03 -05:00
Hake Huang 3940b407d9 driver: update gpt driver to support internal divider by dts
using dts support gpt clock source and divider

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Hake Huang 2a6657f952 clocks: ccm add gpt clock control into ccm driver
add clock frequence support for gpt

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Hake Huang 2a8a580825 clocks: add clock api for gpt
add clock api for gpt

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Hake Huang 38c53b6347 dts-binding: dts/bindings/timer: add gpt freq in dts binding
add gpt freq in dts binding

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Hake Huang 2d7f2a0f26 dts: add nxp gpt freq setting in dts
gpt has internal divider, add dedicated attributes
nxp,gptfreq is added as required one
gpt can customize the gpt freq

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-01-22 08:34:49 -06:00
Watson Zeng f27e7bccf9 arc: sys_io: fix sys_read32 return value from uint16_t to uint32_t
Fix sys_read32 return value from uint16_t to uint32_t.
Current implementation causes read/modify/write of 32bit
registers to fail on the high bits.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2021-01-22 09:32:09 -05:00
Flavio Ceolin f38ba314ea soc: nordic: Disable PM for SOC_NRF5340_CPUNET_QKAA
This targets was previously enabling PM but the code was doing nothing
because the logic was under an unsatisfied ifdef condition.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 7f48e992e8 soc: efm32wg: Select SOC_GECKO_CORE if pm is enabled
Power management requires core interrupt handling.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 321ce7fb77 power: Use substate-id in pm subsystem
Change subsystem to use struct pm_state with substate-id instead of
using only the power state category.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin c5e82ecec3 power: Add substate-id property for a power state
There are platforms that have multiple states that maps to a specific
Zephyr power state. To accommodate this sort of situation this commit
adds an additional property to a power state that can be used by the
platform.

The power state now consists of two properties, a category and a
substate-id. The former property is the current power state.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin d21808b0b1 power: Remove residency and states from Kconfig
Residency time and power states are defined using device tree now.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 9d7ddc1d0c power: Create necessary function stubs
Power management require stubs for pm_power_state_set() and
pm_power_state_exit_post_ops().

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin d21cfd5f36 power: Remove power management conditionals from code
Remove conditionals (PM_DEEP_SLEEP_STATES and PM_SLEEP_STATES) from
power management code. Now these features are always available when
power management is enabled.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 579f7049c7 power: Move pm subsystem to new power states
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 539ccb880a power: dts: Return empty list when the are no power states
Return an empty list when information about power states is not
defined in the device tree of an specific target.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin d5387f68e2 boards: cc26x2r1_launchxl: Add idle states in dts
Add information about this board idle states in its dts.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 6da709e097 boards: cc1352r_sensortag: Add idle states in dts
Add information about this board idle states in its dts.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 7f637c7ee3 boards: mec15xxevb_assy6853: Add idle states in dts
Add information about this board idle states in its dts.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin f1ce4463b9 boards: mec1501modular_assy6885: Add idle states in dts
Add idle states info in this board dts.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin b7e4e982e1 dts: mec1501hsz: Add cpu label
Add label to facilitate add cpu-idle-states later.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 8a255d1b83 boards: cc1352r1_launchxl: Add idle states in dts
Add information about this board idle states in its dts.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 47e3577ff2 dts: power: Change pm state properties
Making it looks more Linux alike

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Luiz Augusto von Dentz d8a41c8179 net: buf: Allow passing NULL as allocator to net_buf_append_bytes
This enables to use net_buf_append_bytes without passing an allocator in
which case the code would attempt to use the net_buf_pool of the
original buffer.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2021-01-22 16:30:19 +02:00
Peter Bigot 0ab314f705 kernel: const-qualify objects used to calculate delay values
The internal API to measure time until a delay expires does not modify
the referenced timeout.  Make the functions that call it take pointers
to const objects, so that they can be used with pointer to
const-qualified containers.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-01-22 08:05:26 -06:00
Anas Nashif f9b76ca76e ci: compliance: fail on errors
Fail workflow in case of script crashes.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:55:06 -05:00
Anas Nashif 6f61663695 Revert "arch: add KERNEL_VM_OFFSET"
This reverts commit fd2434edbd.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif 9c86416598 Revert "linker-defs: add syms for kernel image bounds"
This reverts commit 8a365048bb.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif 25d589d46d Revert "x86: linker: define z_mapped_* symbols"
This reverts commit 891776ec2a.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif 8e6add58b0 Revert "arm64: linker: define z_mapped_* symbols"
This reverts commit 9559223c7b.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif 371c6d4142 Revert "tests: x86: pagetables: pass if userspace disabled"
This reverts commit 898621a1b4.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif db0732f11d Revert "kernel: add CONFIG_ARCH_HAS_RESERVED_PAGE_FRAMES"
This reverts commit 9d2ebfff58.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif 8e84eaf73e Revert "kernel: add page frame management"
This reverts commit 2ca5fb7e06.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif 0417b97257 Revert "kernel: add k_mem_map() interface"
This reverts commit 69d39af5e6.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif 6b82664a5a Revert "mmu: add k_mem_free_get()"
This reverts commit 9111ec2c19.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif 4422b1d376 Revert "x86: reserve the first megabyte"
This reverts commit 51e3c9efa5.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif 0d2724649e Revert "x86: tests: pagetables: fix assumptions"
This reverts commit a7d8b3385a.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif 34e9c09330 Revert "arch: remove KERNEL_RAM_SIZE"
This reverts commit 73561be500.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00
Anas Nashif ee599d88c3 Revert "newlib: memory-map the heap, cleanups"
This reverts commit bf91269738.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2021-01-22 08:39:45 -05:00