Commit Graph

5 Commits

Author SHA1 Message Date
Andrew Boie 231e617593 nios2: enable instruction/data caches
The caches get initialized on boot and flushed after XIP copy
takes place.

Change-Id: I642a14232835a0cf41e007860f5cdb8a2ade1f50
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-07-01 00:34:47 +00:00
Andrew Boie 0b98056350 _nios2_read_sp: fix register read
We were reading et and not sp.

Change-Id: I064e8bebf2107f1900d31c213e7752e1aaead2ca
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-28 22:46:02 +00:00
Andrew Boie 7bd697b0d5 nios2: add _nios2_reg_write/read functions
The technical manuals and example HAL code frequently refer to
register bank numbers from some base address. Add these helper
functions to read and write registers correctly using this
notation.

Change-Id: Ia082f5cc89081fcea2cb6ad8204c1b9b2650d3fd
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-22 16:42:19 +00:00
Andrew Boie 01724d319d nios2.h: cleanup API
This header was pulled in verbatim from Altera HAL and had
some style and naming issues. The inline functions or macros
which read registers can now be used in expressions.

Change-Id: I7a463717051efd2f9dd36e8a84d357852fbf9215
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-06-10 15:22:41 +00:00
Andrew Boie cfe645cef3 nios2: add config-independent CPU defines
This file is taken verbatim from the Altera Nios II HAL
source and includes various useful processor defines
and macros.

Change-Id: Idbf0b49bebe33bb5a53f5155d927bafadda9a2fe
Origin: nios2.h Altera Nios II HAL
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2016-05-09 18:09:28 +00:00