Commit Graph

10 Commits

Author SHA1 Message Date
Andre Guedes afcc923172 drivers: Replace DEV_USED by -EBUSY
This patch replaces all occurences of the macro DEV_USED by -EBUSY
at the driver level. So this patch touch the files under drivers/,
include/ and samples/drivers/ when applicable.

This patch is part of the effort to transition from DEV_* codes to
errno.h codes.

Change-Id: I21eb3ffe9bdfde98593dcf63c50a8bdcd376e49e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:30:04 -04:00
Andre Guedes b3cb3a1f68 drivers: Replace DEV_INVALID_CONF by -EINVAL
This patch replaces all occurences of the macro DEV_INVALID_CONF by
-EINVAL at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/ when applicable.

This patch is part of the effort to transition from DEV_* codes to
errno.h codes.

Change-Id: Idae0d5af8dd780416977c9261a5fb6188c3aab64
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:30:04 -04:00
Andre Guedes 7c956d2ece drivers: Replace DEV_FAIL by -EIO
This patch replaces all occurences of the macro DEV_FAIL by -EIO
at the driver level. So this patch touch the files under drivers/,
include/ and samples/drivers/ when applicable.

This patch is part of the effort to transition from DEV_* codes to
errno.h codes.

Change-Id: I0594ab5dbe667e074c250129e7c13ce512ac940f
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:30:04 -04:00
Andre Guedes 024cfe754e drivers: Replace DEV_OK by 0
This patch replaces all occurences of the macro DEV_OK by the actual
value 0 at the driver level. So this patch touch the files under
drivers/, include/ and samples/drivers/.

This patch is part of the effort to transition from DEV_* codes to
errno.h codes.

Change-Id: I69980ecb9755f2fb026de5668ae9c21a4ae62d1e
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:30:04 -04:00
Johan Hedberg 0efd558cbc SPI: Change read/write buffer pointers to void *
There's no reason to require callers to cast their data to uint8_t *
when the data might e.g. originate in a packed struct or some other
data type. Instead, be nice to callers and let them use any pointer
they want. Additionally, declare the TX buffer as a const pointer so
unnecessary typecasts aren't needed for that either (if the data
originates in a const location).

Change-Id: I1482ca4e350b5a7fbda6871ed9f54f255af3aa9e
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
2016-03-04 20:13:21 +00:00
Andre Guedes 424cd841e2 spi: Enable QMSI driver for Quark D2000
This patch fixes the QMSI SPI shim driver so we are able to use it in
Quark D2000 based platforms. The only change required to enable this
driver is an #if guard in spi_qmsi_init() because the macro QM_SPI_MST_1
and the function qm_spi_master_1_isr are not defined in QMSI headers
from Quark D2000.

Since this drivers is now properly working on Quark D2000, this patch
also sets the QMSI driver default options in arch/x86/soc/quark_d2000/
Kconfig.

Change-Id: Ic6e2f7f5a2c3f350ddf360b23ffab6b812948572
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-02-20 14:57:45 +00:00
Vinicius Costa Gomes b5ff3fe0dd spi: qmsi: Fix enabling the CS line too late
There are situations when the transfer starts before we have the time to
enable the CS line, so to be sure, we active it before even attempting
to start the transfer.

This fixes an CC2520 driver initialization issue using the QMSI SPI driver.

Change-Id: Ib9b324b77260ac537f714376c8056b1543e7e3b3
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-02-05 20:25:30 -05:00
Vinicius Costa Gomes 8166cf8d8f spi: qmsi: Add support for selecting the driver's init priority
Because of the necessity of using a GPIO pin as Chip Select, we need to
set the initialization priority of the SPI driver so it occurs after the
GPIO driver.

Change-Id: I02d675d8267ee07b267155a3806be85fbf57378c
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-02-05 20:25:29 -05:00
Vinicius Costa Gomes 39d87755c1 spi: qmsi: Add support for using a GPIO pin as CS
There are cases that it is needed to use a GPIO pin as chip
select (frames would be too long, for example), so using a GPIO pin as
chip select to keep the line active while the transfer is ongoing is the
usual solution.

This implements that solution for the QMSI shim driver.

Change-Id: Ia6b8f0f17161e20f87ad3def1468fe0abea65fdc
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-02-05 20:25:29 -05:00
Vinicius Costa Gomes 40f8914376 spi: Add QMSI-based implementation
This driver uses the QMSI library and mostly translates calls from the
Zephyr API to QMSI ones.

This driver conflicts with the native driver implemenation. In order to
enable it, you must set:
CONFIG_QMSI_DRIVERS=y
CONFIG_QMSI_INSTALL_PATH="PATH_TO_QMSI"
CONFIG_SPI_QMSI=y
CONFIG_SPI_QMSI_PORT_0=y
CONFIG_SPI_QMSI_PORT_1=y

Missing:
 - Support for using a GPIO pin as Chip Select;

Change-Id: I0d8eca88a2a803b6b3604f396f874313fe90753c
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-02-05 20:25:29 -05:00