Commit Graph

6 Commits

Author SHA1 Message Date
Daniel Leung cecc4b0fb5 pinmux: remove base address and number of pins from kconfig
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.

Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-28 15:58:29 -07:00
Daniel Leung 8df10d4584 kconfig: untangle ordering and dependencies
There are two major issues with the kconfig:

() Some of the config options have incorrect dependencies inside help
   under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.

() Since the SoC and board specific kconfig files are parsed first,
   the help screen would say, for example, CONFIG_SPI is defined at
   arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
   the actual config is defined in drivers/spi/Kconfig.

These cause great confusion to users of menuconfig/xconfig.

To fix these, the SoC and board defaults are now to be parsed last.

Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.

And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.

Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Vinicius Costa Gomes d872bb173c pinmux: Move STM32 boards to the pinmux model
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.

Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-25 06:17:33 -04:00
Maciek Borzecki c97906cba6 boards/stm32_mini_a15: default to 115200 for USART1 speed
Change-Id: Ie4ff6bd5559ee2861201e2137986430d6221e564
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-23 11:47:36 -04:00
Maciek Borzecki 7823380710 boards/stm32_mimi_a15: enable 72MHz system clock by default
Enable 72MHz SYSCLK by default. We use the fact that there is an
on-board 8MHz quartz oscillator available as HSE clock signal. Make sure
not to exceed 36MHz clock limit on APB1.

Change-Id: I9ebc2144910253e68cd8a9b078884852f01c2cab
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-23 11:47:36 -04:00
Maciek Borzecki 84cf5a8b0b boards/stm32_mini_a15: add new board
Introduce configuration for STM32 MINI A15 embedded development
board. The board has a STM32F103VET6 MCU on board. The MCU has 64KB of
SRAM and 512KB of flash.

The board has the following peripherals:
- RS232 port on DB9 connector, connecting to USART1, pin mapping:
  - PA9-US1-TX
  - PA10-US1-RX
- a LED diode (U2) connected to pin PB5
- micro SD card connector with pin mapping:
  - PC8-SDIO-D0
  - PC9-SDIO-D1
  - PC10-SDIO-D2
  - PC11-SDIO-D3
  - PC12-SDIO-CK
  - PD2-SDIO-CMD
- on board SPI flash AT45DB161D-SU, pin mapping;
  - PA4-SPI1-NSS
  - PA5-SPI1-SCK
  - PA6-SPI1-MISO
  - PA7-SPI1-MOSI
- button (K1), connecting PB15 to GND
- 40-pin header connector XS5

Change-Id: Ia378b105abb25fb589a100185ea96512a5f98cf3
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
2016-03-18 20:49:31 +00:00