zephyr

Commit Graph

Author	SHA1	Message	Date
Jordan Yates	dcce5b1a74	dts: linker region properties Add `zephyr,linker-region` properties to all nodes sram1, sram2, sram3, sram4, sdram1, sdram2, backup_sram, ti_ccfg, dtcm and itcm. Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>	2021-12-09 16:23:03 +01:00
Immo Birnbaum	f668474e4d	soc: arm: dts: arm: xilinx: Zynq-7000 SoC init code, device tree data Add SoC-specific code, the basic device tree and Kconfig data as well as the corresponding linker command file for the Xilinx Zynq-7000 family of SoCs. This SoC - either as a QEMU simulation or on actual hardware such as the Avnet/Digilent ZedBoard - is suitable as an ini- tial target for the ARMv7 Cortex-A support. Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>	2021-10-28 15:26:50 +02:00

Author

SHA1

Message

Date

Jordan Yates

dcce5b1a74

dts: linker region properties

Add `zephyr,linker-region` properties to all nodes sram1, sram2, sram3,
sram4, sdram1, sdram2, backup_sram, ti_ccfg, dtcm and itcm.

Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>

2021-12-09 16:23:03 +01:00

Immo Birnbaum

f668474e4d

soc: arm: dts: arm: xilinx: Zynq-7000 SoC init code, device tree data

Add SoC-specific code, the basic device tree and Kconfig data as well
as the corresponding linker command file for the Xilinx Zynq-7000
family of SoCs. This SoC - either as a QEMU simulation or on actual
hardware such as the Avnet/Digilent ZedBoard - is suitable as an ini-
tial target for the ARMv7 Cortex-A support.

Signed-off-by: Immo Birnbaum <Immo.Birnbaum@weidmueller.com>

2021-10-28 15:26:50 +02:00

2 Commits