Commit Graph

85 Commits

Author SHA1 Message Date
Gerson Fernando Budke 10aa57857d drivers: pinctrl: Update Atmel sam0 driver to new API
This update current Atmel sam0 pinctrl initiative to current Zephyr
pinctrl API. It update current devicetree bindings and add the sam0
pinctrl driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-03-24 15:45:37 -07:00
Gerson Fernando Budke cb201430cf drivers: pinctrl: Update atmel sam driver to new api
This update current Atmel sam pinctrl initiative to current Zephyr
pinctrl API. It update current devicetree bindings and add the sam
pinctrl driver.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2022-03-24 15:45:37 -07:00
Filip Kokosinski 38f38e0be8 boards: FE310-based boards: transition to pinctrl driver
This commit makes the transition from the pinmux driver to the pinctrl
driver. It also modifies UART, SPI and I2C drivers used in FE310-based
boards to use the new pinctrl API.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-03-24 10:46:34 +01:00
Filip Kokosinski a5cc185b9b drivers: pinctrl: add SiFive pinctrl driver
Add a pinctrl driver used in FE310-based boards.

Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
2022-03-24 10:46:34 +01:00
Daniel DeGrasse 02352e9b7c drivers: pinctrl: Fix kinetis pinctrl slew rate
kinetis pinctrl driver had swapped values for slew rate
(fast slew rate should set bit to zero). Fix slew rate values.

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-22 12:36:04 +01:00
Georgij Cernysiov 7fa2033852 dts: bindings: pinctrl: stm32: add SWJ CFG to F1
Adds 'swj-cfg' property to the F1 pinctrl. It is an optional
property that allows to control Serial Wire JTAG
configuration.

Different configurations allow to free certain IO
pins that can be used in remap or standalone.

That replaces previously used Kconfig approach.

Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
2022-03-16 10:26:37 +01:00
Andrzej Głąbek fd7633126e drivers: pinctrl: nrf: Add support for PWM, QDEC, and QSPI peripherals
Add support for configuring pins to be used by the nRF PWM, QDEC, and
QSPI peripherals.
A new custom property "nordic,invert" is added to the pin configuration
group binding to allow configuring PWM channel outputs as inverted.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2022-03-15 18:38:01 +01:00
Hake Huang 084e6dfbd2 dts: binding: rename pinmux to gpr
rename pinmux to gpr
different from pinmux and io settings gpr will do more IO
settings.

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2022-03-15 10:12:57 -05:00
Hake Huang a6e8c3d3e1 dts: bindings: add pinctrl binding for nxp mcux rt1xxx
Add dts binding for rt1xxx pinctrl driver settings. A binding file is
present for the pinctrl node itself, and for the pinctrl child node that
defines all pinmux options

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-15 10:12:57 -05:00
Jay Vasanth 5917ab9009 dts: Update MEC172x pinctrl dts
Update dtsi and dts bindings for pinctrl driver

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-07 11:03:06 +01:00
Daniel DeGrasse 2fdd276d35 dts: bindings: Add pinctrl node group binding for kinetis
Add pinctrl node group bindings for kinetis MCUs

Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
2022-03-03 13:00:20 -06:00
Yuriy Vynnychek 4747f3ac3d dts: riscv: telink_b91: replace pinmux by pinctrl
Replaced pinmux by new pinctrl driver for Telink B91.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2022-02-21 19:41:44 -05:00
Yonatan Schachter fd59038312 drivers: pinctrl: Added pinctrl driver for RPi Pico
Added a pinctrl driver for the Raspberry Pi Pico series

Signed-off-by: Yonatan Schachter <yonatan.schachter@gmail.com>
2022-02-02 16:23:35 +01:00
Julien Massot b06862ca11 dts: bindings: pinctrl: add Renesas R-Car Pinmux
Renesas R-Car series contains a PFC (Pin Function Controller).
This module consists of registers for selecting the function of
the multiplexed pins and controls the pull-up resistor on each pin.

Signed-off-by: Julien Massot <julien.massot@iot.bzh>
2022-01-17 21:00:58 +01:00
Hake Huang f417678e6d dts: bindings: add audio related dts bindings for imx-rt
add anatop, i2s and pinmux dts

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2021-12-02 10:50:21 +01:00
Gerard Marull-Paretas 22c8c02145 drivers: pinctrl: nrf: initial support
Add initial support for nRF pin controller driver. The implementation in
this patch does not yet support any peripheral. Only states
representation and basic driver functionality is introduced.

Note:
The nrf_pin_configure function has been marked as __unused since it may
not be used in certain scenarios until all peripherals are supported by
the pinctrl driver. For example, if only UART/E is supported but the
board does not enable UART, the function will never get called. However,
that board will likely have other peripherals that will gain support in
the future.

Thanks to Marti Bolivar for bindings documentation.

Co-authored-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Gerard Marull-Paretas f8017dc5ad drivers: pinctrl: gd32: initial support for AFIO based SoCs
Add a pin control driver for GD32 SoCs using the AFIO model.

Thanks to Gerson Fernando Budke for testing and implementation
suggestions.

Co-authored-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-11-22 16:30:28 -05:00
Gerard Marull-Paretas 543a3843ff drivers: pinctrl: gd32: initial support for AF based SoCs
Add a pin control driver for GD32 SoCs using the AF model.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2021-11-22 16:30:28 -05:00
Gerard Marull-Paretas c871317e8f dts: bindings: pinctrl: add pincfg-node-group
When using group based representation on pinctrl nodes, the pin
configuration properties end up being at the grand-children level, so
the `pincfg-node.yaml` file can't be used.

Having a common file that can be used for both cases would require
tooling changes, so for now a copy that operated at the grand-children
level has been created.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-25 15:26:47 -05:00
Gerard Marull-Paretas 4040df096f drivers: pinctrl: initial skeleton
Initial skeleton for pinctrl drivers. This patch includes common
infrastructure and API definitions for pinctrl drivers.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-25 15:26:47 -05:00
Erwan Gouriou 76505cff9f dts/bindings/pinctrl: stm32: Add properties for PA11/PA12 pin remaps
Add specific properties to enable remap for PA11/PA12, which is a
possibility on STM32G0/F0 SoCs.
These properties only have effect when defined.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-10-07 15:38:53 -04:00
Scott Worley 2070c0997f Microchip: MEC172x: Update pinmux driver
Update the Microchip XEC pinmux driver to use system I/O
routine for read/write of registers instead of direct use
of volatile and CMSIS defines. Add GPIO port number to
bindings instead of using hard coded value from chip headers.
Modify SoC DTSI pinmux syntax, requires "pinmux: pinumx {..."
or the DT macros will not work. Since pinmux is used by MEC152x
we update its chip pinmux DT.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2021-08-03 19:04:56 -04:00
Gerson Fernando Budke c9879a58f7 dts: atmel_sam0: Add pinctrl structure
Add Atmel sam0 MCU series pinctrl devicetree bindings and
infrastructure.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-07-30 14:37:20 -05:00
Yuriy Vynnychek 77bd56f9b1 dts: riscv: add basic dts support for new Telink B91 platform
CPU, Power, GPIO, Serial and Pinctrl dtsi support for new
Telink B91 RISC-V platform.

Signed-off-by: Yuriy Vynnychek <yura.vynnychek@telink-semi.com>
2021-07-21 05:37:12 -04:00
Martí Bolívar 73055c8592 dts: bindings: pinctrl: fix up multi-line strings
Clean up multi-line strings so they will show up properly in the
bindings index in the HTML documentation.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-06-14 21:49:57 -04:00
Tim Lin 8ea58d4389 ite: drivers/adc: create pinmux phandle to the ADC driver node
Create the pinmux phandle to the ADC driver node in the
devicetree. When the pinmux_pin_set function in
adc_it8xxx2_channel_setup can refer to the setting of
this phandle. It is more flexible to use.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-06-11 15:47:25 +02:00
Tim Lin caa3328cc7 ite: drivers/pinmux: modify pinmux driver
Modify the pinmux control method and add support the fun3
& fun4 alternation function.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2021-05-05 08:45:16 -04:00
Kumar Gala 95f866ef15 dts: bindings: nxp,kinetis-pinmux: Update binding for pin data
Update the binding for how we represent pin data to support child
nodes with a nxp,kinetis-pins property that has the pin data.

For example:

      UART0_CTS_PTA0: uart0_cts_pta0 {
           nxp,kinetis-port-pins = < 0 2 >;
      };

Also pull in pincfg-node.yaml to get various common pin flags like
"bias-pull-up", "drive-open-drain", etc.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-04-08 17:08:33 -05:00
Erwan Gouriou e4ba0ff2bc dts/bindings: pinctrl: Include pincfg-node in st,stm32-pinctrl.yaml
Make use of bindings filtering to inlcude pincfg-node.yaml in
st,stm32-pinctrl.yaml

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-04-08 16:58:33 -05:00
Mulin Chao d3a94fa8ab dts: npcx: Fixed the name of nodes in device-tree files.
Fixed the name of nodes in device-tree files by following rules:

If object is 'phandles', use underscores for object name.
If not, such as 'node' or 'property', use hyphens for object name.

This CL also applies normal style for all nodes in npcx device-tree
files.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-04-08 16:35:20 +02:00
Mulin Chao 12a30dce19 dts: psl: npcx: add PSL pads support for ultra-low-power mode.
This CL introduces the Power Switch Logic (PSL) pads which detect the
wake-up events and turn on/off core power supply (VCC1) for ultra-low
-power consumption in npcx device-tree file.

By adding PSL input-pad objects, psl_in1, psl_in2, and so on, into
'psl-in-pads' property and configuring their 'flag' properties, the
related driver will configure them via soc specific functions later.

For example, if PSL input 1 pad that is plan to detect a 'falling edge'
event, this property should be:
	vsby-psl-in-list {
		psl-in-pads = <&psl_in1>;
	};

And the flag property in psl_in1 should change to
	&psl_in1 {
		flag = <NPCX_PSL_FALLING_EDGE>;
	};

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-03-26 07:11:59 -04:00
Jun Lin 2638f2ecc4 npcx: move scfg driver from pinctrl to soc/arm/nuvoton_npcx/common
In NPCX chips, System Configuration module can configure not only
pinctrl but also misc. functionality such as glue and flash write
protection. This change moves the scfg driver from the pinctrl folder
to soc/arm/nuvoton_npcx/common and renames it to avoid confusion.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2021-03-17 18:47:32 -04:00
Gerson Fernando Budke 68dcac3be6 dts: arm: cypress: Introduce PSoC-6 pinctrl
Introduce PSoC-6 pinctrl infraestructure and definitions.  This add
files to handle devicetree entries and following modifications:

 - add pinctrl bindings
 - update gpio bindings with pin-cells
 - add pinctrl node and move gpio nodes inside
 - declare pinctrl for current uart entries

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2021-03-16 13:36:15 -05:00
Gerson Fernando Budke bc9b9a0689 dts: pinctrl: atmel: sam-pinctrl: Switch to pincfg-node
Add pincfg-node compatibility.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-03 10:12:57 -06:00
Gerson Fernando Budke 2e15665cad dts: pinctrl: Introduce pincfg-node
Many data items that are represented in a pin configuration node are
common and generic.  Pin control bindings should use the properties
defined on a standard way when are applicable; not all of these
properties are relevant or useful for all hardware or binding
structures.  Each individual binding document should state which of
these generic properties, if any, are used, and the structure of the
DT nodes that contain these properties.

This is based on Linux, documentation:
https://www.kernel.org/doc/Documentation/devicetree/bindings/pinctrl/pincfg-node.yaml

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2021-03-03 10:12:57 -06:00
Kumar Gala 686968b16a dts: arm: nxp: lpc: Add dts nodes for IOCON
Add binding and dts nodes for the IOCON and IOCON ports on the LPC
family of SoCs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-03-01 12:04:53 -06:00
Kumar Gala ca5272f239 pinctrl: cc13x2_cc26x2: drop label property from pinmux node
We've removed the need for label properties from the pinmux devicetree
nodes on all other controllers and its not required for the TI one, so
remove it from the .dts and drop label being required in the binding.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 16:46:31 -06:00
Kumar Gala 942916e691 arm: nxp: kinetis: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 16:45:02 -06:00
Kumar Gala c54005235c riscv: ite: it8xxx2: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-16 09:45:57 -05:00
Kumar Gala f6b7dd09ec pinmux: sifive: Convert SiFive pinmux to be devicetree based
Add a simple pinctrl node for the IOF registers under the GPIO
controller node to be used by the pinmux driver.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:33:00 -05:00
Kumar Gala d6b4995d6a riscv: rv32m1: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:32:41 -05:00
Kumar Gala 6e8eb53b51 arm: atmel: sam0: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:31:29 -05:00
Kumar Gala 4276d7d247 pinmux: hsdk: Convert ARC HSDK pinmux to be devicetree based
Add a simple pinctrl node for the CREG GPIO MUX register to be used
by the pinmux driver.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:29:56 -05:00
Kumar Gala 147bb6b9f3 arm: microchip: mec1501hsz: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-15 08:29:34 -05:00
Kumar Gala 1cb2dceeb4 xtensa: intel_s1000: Rework device_get_binding for pinmux
Switch to use DEVICE_DT_GET instead of device_get_binding for pinmux
device.  As part of this change drop the "label" property from
the pinmux devicetree node and update the binding and dts files to
reflect that.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2021-02-14 22:12:07 -05:00
Mulin Chao b7ec2cd5de driver: gpio: add 1p8v level detection support in npcx series.
Part of GPIO pads in npcx series support low-voltage (1.8V) level
detection. In order to introduce this feature, this CL adds a new
NPCX-specific controller property, lvol_io_pads, in devicetree file.
For example, here is devicetree fragment which turn on low-voltage
support of i2c1_0 port.

/ {
      def_lvol_io_list {
          compatible = "nuvoton,npcx-lvolctrl-def";
          lvol_io_pads = <&lvol_io90   /* I2C1_SCL0 1.8V support */
                          &lvol_io87>; /* I2C1_SDA0 1,8V support */
     };
  };

Then these pads will turn on 1.8V level detection during initialization.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2021-01-18 19:09:34 +01:00
Kumar Gala 673a81eabb pinmux: Convert drivers to be devicetree based
Convert drivers to use pinmux devicetree node to create pinmux device
object.

On intel S1000 we add 'label' as a required property and set it to
'PINMUX' to match CONFIG_PINMUX_NAME.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-12-19 20:04:23 -05:00
Kumar Gala 09c401fba6 dts: arm: nxp: Add label to pinmux ports for Kinetis SoCs
Add 'label' as a required property for nxp,kinetis-pinmux devices.  In
addition we cleanup the kw2xd node labels for the pinmux devices to
match the SoC docs and use 'port' instead of 'pinmux_'.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-12-18 07:52:52 -06:00
Cheryl Su f060540b33 dts: it8xxx2 device tree and binding
This commit is about it8xxx2 platform device tree.
Add driver's binding files, and one device tree as sample.

Signed-off-by: Cheryl Su <cheryl.su@ite.com.tw>
2020-12-16 08:47:36 -05:00
Mulin Chao 173704859a dts: npcx7: rename pinctrl property to pinctrl-0
rename 'pinctrl' property to 'pinctrl-0' in device-tree files

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-10-21 06:33:20 -05:00