Commit Graph

7 Commits

Author SHA1 Message Date
Vlad Lungu c36daba63d spi: intel: fix port 1 pin setup
Currently, the /CS pin is deasserted by _spi_config_cs() and
the pinmux driver sets it as an input afterwards. Later, setting
the /CS pin to an output via pinmux_dev asserts it.

Setting the SPI port 1 pins in the pinmux driver saves a few lines
of code. Moving the SPI init after pinmux init keeps the /CS pin as
configured by the SPI driver.

Change-Id: I4c587ba0a6983cd89dfb5ecedb2914335e86313b
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
2016-04-16 21:14:43 +00:00
Dmitriy Korovkin 977ba05d53 galileo: Enable PCI enumeration
If an external PCIe card inserted into Galileo board, the
devices I/O addresses may differ from the preconfigured ones.
For this reason PCI enumeration needs to be enabled.

Change-Id: I54b5ef9149f9eda0a390909a433b0e13a3dd7ecd
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-04-08 16:02:44 +00:00
Dmitriy Korovkin d78a2e34d6 galileo: Fix SPI driver init level
On Galileo Gen2 board SPI uses GPIO pin for CS.
Thus spi_intel driver must be initialized after gpio_dw,
so it's init level must be more that gpio_dw's one.

Change-Id: If2e5fb1106afe01e5567cf3fe72063bdc94ad3d2
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-03-31 23:17:00 +00:00
Daniel Leung 546b8ade37 refactor common driver initialization priorities
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.

The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.

This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.

Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.

Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-28 15:58:29 -07:00
Daniel Leung cecc4b0fb5 pinmux: remove base address and number of pins from kconfig
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.

Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-28 15:58:29 -07:00
Daniel Leung c215ef7213 kconfig: add conditions to device init priority defaults
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.

Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Daniel Leung 8df10d4584 kconfig: untangle ordering and dependencies
There are two major issues with the kconfig:

() Some of the config options have incorrect dependencies inside help
   under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.

() Since the SoC and board specific kconfig files are parsed first,
   the help screen would say, for example, CONFIG_SPI is defined at
   arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
   the actual config is defined in drivers/spi/Kconfig.

These cause great confusion to users of menuconfig/xconfig.

To fix these, the SoC and board defaults are now to be parsed last.

Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.

And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.

Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00