Add hidden configuration HAS_KSDK for SoCs to select if they have
support in the ksdk.
Change-Id: Ia4cd11901bc26d21a3bdfad6236d66656bb292cb
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
There was a reference to SOC_FAMILY_NRF5 which was not use by anyone
else and it seemes like it was a typo, where the right reference was
to symbol SOC_NRF5. However, the right fix is to move both sites to
use SOC_FAMILY_NRF5 *and* fix the SOC_SERIES to be only nrf52,
otherwise it causes path duplication and the build fails.
This was also causing documentation warnings that are thus killed.
Change-Id: I92e74a6158f02df43e6e857df8f1e67bcfdd9551
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
The KSDK device header files require a preprocessor macro that defines
the part number string (e.g., MK64FN1M0VMD12). Create a hidden Kconfig
option to hold the part number string, and hidden Kconfig options that
the board Kconfig will use to select the specific part number.
Change-Id: I612e785026261e425b47b5b7fae0c65b4f94b30b
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Include nrf.h instead of directly using the specific header
required. This will be useful in the future when additional
Nordic ICs are supported.
JIRA: ZEP-377
Change-Id: I7a7257b0aaa5fa0a0d202322c366efbdd1d84458
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Translate CONFIG_SOC_SERIES_NRF52X to NRF52, which is the macro
expected by the Nordic MDK headers.
JIRA: ZEP-377
Change-Id: Ic846e4cddf8146ae9d96bc98d4b12311552dc4f6
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Generate kernel image in Intel Hex format when building for the nRF52.
Remove the additional step from the board doc file.
Change-Id: I619496f64037c2a0ac459ae05e549e01458e0f71
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Moved setting of specific Cortex-M compiler flags in each SoC directory
unify setting them in the arch/arm/soc Makefile.
Add flags for Cortex M0, M0+, M1, M3, M4, and M7. However only
CONFIG_CPU_CORTEX_M3 and CONFIG_CPU_CORTEX_M4 are supported at this time
As part of this change converted Kbuild files for some SoCs into
Makefiles as the Makefiles would be empty otherwise.
Change-Id: Ie4e0178b141ca761ec482a610ae50e94fe58070f
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Introduce a soc-cflags, soc-cxxflags, and soc-aflags as a means for
SoC specific compiler flags to be set without manipulating Kbuild
options directly.
Change-Id: I2c8f5019fb237429e59717ef96bd4251a61dc1a5
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use the same Kconfig infrastructure and options for all SPI drivers.
Jira: ZEP-294
Change-Id: I7097bf3d2e1040fcec166761a9342bff707de4dd
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Avoids confusion with .gitignore rules, which were inadequate to
cover all the places where these files are found. At least in
VIM, these files are now syntax highlighted correctly.
Change-Id: I23810b0ed34129320cc2760e19ed1a610afe039e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The UART console init should be done after UART init. So it can be
folded into general UART init, thus one fewer SYS_INIT().
Change-Id: Ifb18c5308dfef790325e6bff5bc7b5976fcd421e
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The clkInit() is always called so this can be inlined.
This saves 32 bytes of ROM space compared to non-inlined version.
Change-Id: I2cb6d02c0996acad16029be243f6059183938089
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The clock_init() is always called so this can be inlined.
This saves 32 bytes of ROM space compared to non-inlined version.
Change-Id: I1b95142da4c22f4b7fc7f7f6210503d90cf65cc9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This also enables GPIO on ATMEL SAM3 when GPIO is set.
Change-Id: I4125af4910d57bed98b0ee4967fb696e3f345e67
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The files soc_config.c and soc_gpio.c use errno code so they should
include errno.h.
Change-Id: I94237aa294701cc71ed17ea42eca9d8073d4ae47
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
It was not possible to add directories under an SoC family
because of the direct call to Makefile in the SoC series from the
architecture level.
While we have SoC still using the old structure, add a conditional
to still support old structure and allow Makefiles directly under
an SoC family directory.
This is useful for adding drivers and BSP files common to one family.
Change-Id: I85dc8341523b41949de91d78675153ce0baa5aac
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
With most boards there's no simple way to get access to the HCI
traffic. Simultaneously these boards only have one external UART for
the console. This patch introduces a protocol which combines both
normal logs and HCI logs over a single binary protocol sent over the
console UART.
The protocol is modeled based on the btsnoop/monitor protocols used by
BlueZ, and the first tool that's able to decode this is btmon from
BlueZ ("btmon --tty <tty>").
For platforms with two or more external UARTs it is still possible to
use CONFIG_UART_CONSOLE as long as the UART devices used are
different, however on platforms with a single external UART
UART_CONSOLE should be disabled if BLUETOOTH_DEBUG_MONITOR is enabled
(in this case printk/printf get encoded to the monitor protocol).
Origin: Original
Change-Id: I9d3997c7a06fe48e7decb212b2ac9bd8b8f9b74c
Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
Use SoC family/series and reoganise the structure to follow new
hierarchy.
Change-Id: I8637f1487a8287a6614ce6636cd018cf342fec95
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add Kinetis SoC family and rename fsl_frdm_k64f to mk64f12.
This will allow adding new SoCs of the same family and the reuse of code
among SoCs of the family and series.
Change-Id: Iea1a663aef7ce0487f147bdd36f668bebe80deb5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.
Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Use CONFIG_SOC_FAMILY for the top level SoC family. A family
will have different SoCs or different SoC series with multiple
SoCs.
Adding the Family string to the config variable to avoid confusion
between actual SoCs and families and to prevent name collisions.
Change-Id: Ic99a2c1df7850dee3a45641027af82464dd6fadb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ifd65097a65f80539cac073f95aadc2d8e42efb9f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There is no need to re-define CONFIG_UART_CONSOLE_ON_DEV_NAME to be
"UART_0" all over the place as its default is "UART_0" already.
So remove those duplicate defaults.
Change-Id: Ia86e26b8f90540fdbd7dcb3358d6dac352648b21
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.
The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.
This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.
Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.
Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.
Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The base address, IRQ line, chip select numbers, and clock
gating constants are static per SoC, so there is no need to
make them configurable in Kconfig.
Change-Id: I9f87ca29c28c38c42d4e4f1a3a41fa231f63ef03
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The base address and IRQ line are static per SoC, so there is no need
to make them configurable in Kconfig.
Change-Id: Ib78401ff136c29642356f5bda9d6cd3e5c98bece
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The UART port base address, IRQ line and clock frequency are static
per SoC, so there is no need to make them configurable in Kconfig.
Change-Id: Ia252958d205e0100d1b92e2a12d4c22411bc94b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The UART port base address, IRQ line and clock frequency are static
per SoC, so there is no need to make them configurable in Kconfig.
Change-Id: I79b142414143bc5ef585d3136a00375233de1723
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.
Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are two major issues with the kconfig:
() Some of the config options have incorrect dependencies inside help
under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.
() Since the SoC and board specific kconfig files are parsed first,
the help screen would say, for example, CONFIG_SPI is defined at
arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
the actual config is defined in drivers/spi/Kconfig.
These cause great confusion to users of menuconfig/xconfig.
To fix these, the SoC and board defaults are now to be parsed last.
Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.
And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.
Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Changed names of Kconfig flags, variables, functions, files and
return codes consistent with names used in the RFC. Updated
relevant comments to match the changes.
Origin: Original
Change-Id: Ie7941032d7ad7af61fc02928f74538745e7966e8
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This moves the STM32 based boards (Nucleo F103RB and STM32 Mini A15) to
the "new" pinmux model.
Change-Id: I190df271a6b83fafeec0b281cd4ee7cf13d7e7db
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Setting the direction of a GPIO pin is not the responsibility of the
pinmux "board" initialisation. This should be left for the GPIO
utilising application.
Some macros that were only used when setting the pin direction are
removed.
Change-Id: I5b63d52446a27fe539c89f0639a8dcadf5ea9f80
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
This patch replaces all occurrences of DEV_* codes by errno.h codes at
the arch layer.
Change-Id: I1a1ab6d0481f3660ad032e2690d2577245fe1f34
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
CONFIG_PWM is set to "no" by default, so there is no need
to do it in the SoC kconfig file. Also, setting CONFIG_PWM
there causes kconfig to think that CONFIG_PWM depends on
CONFIG_SOC_FSL_FRDM_K64F and gives warnings about
unmet dependencies if the certain combinations of CONFIG
are set.
Change-Id: I0028accfc4b585dcfa87e0d5733b789691a598e3
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This makes this board more consistent with the rest of the code base.
Change-Id: I5641c6358e638a3585d2154e67d3536b11436e01
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Add support for use of HSE (incorrectly named PREDIV1)as input of PLL,
along with HSE bypass for stabilized external clock, and XTPRE
prescaler. Update PLL handling so that we do not unnecessarily enable
PLL clocks, instead enabling only the clocks sources that are required
as per user's configuration.
This change allows higher SYSCLK clock values, up to 72MHz.
Change-Id: Ia7c2be3ce11ac0de2efa664b20e7ab5fddd57a51
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Add mapping of registers for embedded flash controller.
Change-Id: I81f891551124e9f124ff59dfe0b3c737ec5b3b63
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Before moving pinmux related code to 'drivers/pinmux' fix their return
codes to be consistent with the rest of the API.
Change-Id: Ie84f64e93745d44bef8b9d2119f6a05cdc8cb8c4
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
Add a driver for Independent Watchdog (IWDG) commonly found in STM32
MCUs. The driver has been tested on STM32F1 family MCU.
Change-Id: Idc6ac35990e46901a206b4af0ce3767eb4875de9
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Add necessary integration for supporting interrupts on GPIO input pins
for STM32F1 line of MCUs.
Change-Id: I0526a85cc3fdb96891c93ba4840ef27d613ab31b
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Add mapping of Alternate Function I/O (AFIO) registers for STM32F1 MCU.
Change-Id: Id3e12290d6869c1f0506549f21407b3cd80d0a64
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Introcuce a driver for External Interrupt/Event Controller (EXTI) found
on STM32 MCUs.
Change-Id: Ib206521fcc51b5dfaaf5dea9d436f8304f3a36be
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>
Add a list of symbolic constants for IRQ lines available on
STM32F1 line of MCUs.
Change-Id: Iebf1847719c0db31cf852529fe5876e3cabbfe52
Origin: Original
Signed-off-by: Maciej Borzecki <maciek.borzecki@gmail.com>