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Author SHA1 Message Date
Daniel Leung 969ca3b60b dts: cpu: add binding for Cadence Tensilica Xtensa LX4 CPU 
This adds a simple binding for the Cadence Tensilica Xtensa LX4
CPU. File originally from the LX6 binding.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
 2020-02-05 10:43:25 -05:00