Commit Graph

9 Commits

Author SHA1 Message Date
Sarath R Nair 8ac992bfcd quark_se: Save/restore debug registers.
In order to set breakpoints after waking up from sleep,
it is needed to save DR0/DR1/DR2/DR3 and DR6/DR7.

As DR4/DR5 are reserved or mapped to DR6/DR7, they are not saved.

Patch2 : Added compile time checks for debug build or soc_watch
build for Intel Energy analysis.

Patch3 : Avoid clobbering of edx.

JIRA: ZEP-1681

Change-Id: I62fbedca16953d57196420ecae4fb93c785bb4a5
Signed-off-by: Sarath R Nair <sarath.nandu.ramachandran.nair@intel.com>
2017-02-11 00:15:08 +00:00
Jesus Sanchez-Palencia bcee91d70e quark_se: Add shared GDT in RAM memory to linker
A new shared memory has been added to the QMSI bootloader in order to
store the GDT in RAM reliably.

Add this new entry to the QUARK SE C1000 linker script and new kconfig
options:

 * CONFIG_BSP_SHARED_GDT_RAM_ADDR to set the address location
   of the GDT in RAM.

 * CONFIG_BSP_SHARED_GDT_RAM_SIZE to set the size used by the
   GDT in RAM.

Additionally, both BSP_SHARED_RAM_ADDR and BSP_SHARED_RAM_SIZE have been
renamed to BSP_SHARED_RESTORE_INFO_RAM_ADDR and
BSP_SHARED_RESTORE_INFO_SIZE respectively, in order to better resemble
what these options are for. All these configs are available
unconditionally.

Change-Id: I07ee8b440d4a3f5e9bdeb62441ff6a7bd6d4c153
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Bartlomiej Majka <bartlomiejx.majka@intel.com>
2017-02-08 11:59:14 +00:00
Kuo-Lang Tseng 23b0074012 ext qmsi: Update to QMSI 1.4 RC2
Update the builtin QMSI code to 1.4 (RC2).
The below shim drivers were updated for API or interface changes:
- aio
- counter
- i2c_ss
- rtc
- wdt.

Also, arch soc specific power management code were updated.

Jira: ZEP-1572

Change-Id: Ibc8fae032a39ffb2c2c997f697835bc0208fd308
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
2017-02-08 11:59:12 +00:00
Benjamin Walsh ee659ae1a1 build: add _ASMLANGUAGE to all asm files
This avoids asm files from having to explicitly define the _ASMLANGUAGE
symbol themselves.

Change-Id: I71f5a169f75d7443a58a0365a41c55b20dae3029
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-01-24 13:34:51 +00:00
David B. Kinder ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Ramesh Thomas 4a09593714 quark_se: power_mgmt: Fixes a cpu context save bug
The cpu context save function was manipulating stack and
returning to C caller. This can corrupt stack if the calling
function has data saved and it pops before entering deep
sleep. Moved sleep functions into assembly to avoid this.

Jira: ZEP-1345
Change-Id: I8a6d279ec14e42424f764d9ce8cbbef32149fe84
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-28 00:59:51 +00:00
Ramesh Thomas 24f94ca49e quark-se: power_mgmt: Add a optional deep sleep resume handler
Some arduino 101 boards have old boot loader without context
restore boot flow feature. This handler will allow doing deep sleep
in those boards by jumping to the context restore code. This will
be disabled by default and can be optionally enabled by user.

Jira: ZEP-1258
Change-Id: I92e70550fd92c1cac42b3039d667fb0be8cf5bce
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-11 20:41:52 +00:00
Julien Delayen fec01af64a power: Update Quark SE PM layer with QMSI 1.3
QMSI 1.3 natively supports restoring the SoC and peripherals
after sleep.

The Zephyr Power Management shim layer is updated
in order to support QMSI functions.

The following functions have been added:
void _sys_soc_set_power_state(enum power_state);
void _sys_soc_power_state_post_ops(void);

In order to fully support deep sleep, the function
_sys_soc_set_power_state now support saving and
restoring CPU context and returns to the application.

_sys_soc_set_power_state function also abstracts
QMSI cpu states and enable the application to choose
between C1/C2 or C2LP states.

The QMSI power states are mapped as follows:
SYS_SOC_POWER_STATE_CPU_LPS -> power_cpu_c2lp
SYS_SOC_POWER_STATE_CPU_LPS_1 -> power_cpu_c2
SYS_SOC_POWER_STATE_CPU_LPS_2 -> power_cpu_c1
SYS_SOC_POWER_STATE_DEEP_SLEEP -> power_soc_deep_sleep
SYS_SOC_POWER_STATE_DEEP_SLEEP_1 -> power_soc_sleep

The following functions have been removed:
void _sys_soc_set_power_policy(uint32_t pm_policy);
int _sys_soc_get_power_policy(void);
FUNC_NORETURN void _sys_soc_put_deep_sleep(void);
void _sys_soc_put_low_power_state(void);
void _sys_soc_deep_sleep_post_ops(void);

Those changes are propagated to the samples.
All calls to QMSI are removed.

Jira: ZEP-1045, ZEP-993, ZEP-1047

Change-Id: I26822727985b63be0a310cc3590a3e71b8e72c8c
Signed-off-by: Julien Delayen <julien.delayen@intel.com>
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
2016-11-03 21:31:30 +00:00
Anas Nashif 0be112fbcb intel_quark: Group Quark SoCs under intel_quark/
Change-Id: If0120aff88310871438562234abf51b26675ff28
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-09-16 03:10:32 +00:00