Fixed doxygen comments for flash API usage. Clarified the use of
flash_write_protection_set API for write and erase operations.
Jira: ZEP-383
Signed-off-by: Kuo-Lang Tseng <kuo-lang.tseng@intel.com>
Change-Id: I6a323915c63a393b7be8f96fe3fcd9616a9b21d1
This fixes invalid cast from struct bt_gatt_attr to bt_gatt_chrc.
Change-Id: Idc2c016e26b5d38d2d4772a7bd79af8357a4da58
Signed-off-by: Mariusz Skamra <mariusz.skamra@tieto.com>
Add missing Kconfig files and connections to expose Kconfig options
in ext/ directories. Fixup QMSI to only be exposed on platforms that
utilize it.
Change-Id: I6c6c5011b2bf2966f65aa8279dc594a244821956
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This allows to use LE SC with nimble firmware running on Arduino 101
board.
Change-Id: I3a9a485dc87c367160da98010d0189dfef09d5de
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
Task can be preempted and bt_recv is expected to be atomic. Since
on microkernel with TinyCrypt ECC enabled this can be called from
task context we need to make it run in critical section.
Change-Id: I24414e8d98b0dfe8affc18058eb164ba0cba7b17
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
If TinyCrypt ECC is used for LE SC calculations need to be done
in task to avoid hogging CPU from non-preemptible fiber. To keep
upper layers of stack independent of crypto used (TinyCrypt or
controller) this patch adds HCI ECC emulation.
If ECC emulation is enabled it is always used regardless of ECC
support being present in controller.
Change-Id: I7c5ca873a18c10237e1c0b2f09e6da2a75fb334e
Origin: Original
Signed-off-by: Szymon Janc <ext.szymon.janc@tieto.com>
The Kinetis SDK provides device header files and peripheral drivers for Kinetis
SOCs. Importing a subset of the SDK to support the K64F peripherals. This will
make it possible to implement a shim layer to adapt the drivers to Zephyr APIs.
Origin: NXP KSDK 2.0
URL: kex.nxp.com
Maintained-by: External
Change-Id: Ie14b42f75dab9126eb1ca4653538c5707b830cb5
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
The ARM Cortex Microcontroller Software Interface Standard (CMSIS) defines a
set of standard interfaces to ARM Cortex-M SOCs. In particular, the CMSIS-CORE
component standardizes the software interface to core and peripheral registers,
as well as exception names and the system clock frequency. Multiple SOC
vendors, including NXP and Nordic Semiconductor, include the CMSIS-CORE header
files in their SOC header files. These SOC header files are in turn used by
the vendor's peripheral drivers.
Origin: ARM CMSIS v4.5.0
URL: https://github.com/ARM-software/CMSIS.git
commit: f25cf2c15304ad872a5b9761651d3f57d6202906
Maintained-by: External
Change-Id: I15c3ddd04619a7608fecb8b710eb115b30cd9632
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Print flag for write_evt() to distinguish between write and
prepare_write. Add offset printing when reading.
Change-Id: I8b53d8f49657ade39b190ab33e99097bb172077c
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Adding test service makes possible to test Bluetooth PTS test cases
with the shell. Currently long and auth characteristic.
Change-Id: I153efd3f7fa266f93873ef978025faf72c664076
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
the flow control and baudrate configuration is for BLE, so
make this dependent on BLE being configured.
Change-Id: I35f8e00ac31658fb1ad4a2751169c076f1e78532
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Fix a compile error when trying to set I2C address of LSM9DS0 Gyro to
VCC (0x6B) caused by a typo.
Change-Id: I27850ecd70e715a10b96572aedea0d237dd55cd5
Signed-off-by: Murtaza Alexandru <alexandru.murtaza@intel.com>
I noticed that even though I was building w/o ADC, that some
ADC config symbols were still defined. Adding some "depends on"
to clean that up.
Change-Id: Ie73d131ba1ad63b5f3d920e17b4c7b5a0d785609
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
This fixes "No matching connection found" error when a packet
is received.
Change-Id: I9f9bba73f9858a9a3a45de26abd378d7c48aa9a7
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Provide functions of saving and restoring LOAPIC
states to support deep sleep.
Jira: ZEP-223
Change-Id: I1fb427989b021ec8e3a4f6dd0f4766a214360621
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Save and restore IOAPIC flags and irq to vector translation
info for supporting deep sleep.
Jira: ZEP-223
Change-Id: Ifc50a5a72699ff6782ad194d8e96b18fac34da18
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
In scenarios where device PM is enabled and dynamic irqs are
used, move the irq to vector table to RAM and keep it updated,
so that we can use this to restore IOAPIC/LOAPIC vector entries.
Jira: ZEP-224
Change-Id: I0d4350d4e30f8ca337a2a1d4f012748c3cb450f4
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
The ARC CPU comes up from reset with i-cache enabled.
It can have garbage in it from a previous run.
The fix is to check the build register for the i-cache, and if its
present, invalidate it fully, and then disable it.
_icache_setup() is called later to turn it on.
Change-Id: I26fae915153841c61e9530d5af2ddb9d0553275b
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
For EM Starter Kit, one of the SOC choices has DRAM and no FLASH.
If FLASH_SIZE is 0, the linker command file will create
SRAM, ICCM and DCCM memories (and no FLASH). SRAM is really DRAM.
Also, the linker.ld file is extended to handle microkernel
objects.
linker_harvard.ld has "all rights reserved". added to banner.
Change-Id: Ia433578b94ce91722f3670819f44befafeecf878
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
EM11D is a ARC CPU configuration that can be selected for the
ARC EM Starter Kit. The board support for this board will be
submitted separately to expidite review.
Change-Id: Ifc4d48e1f5e01d44d1706e6426bd3b2d77ebe2f8
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Board support for the ARC EM Starter Kit provides for a board
that can select one of two SOCs. The EM9D and EM11D commits
will be done separately to expidite review. Also submitted here
is doc/board/em_starterkit.rst to explain details about this
Zephyr board choice.
Change-Id: Icd9fac045c700ad8dcb95161fdd63c130f665778
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
EM9D is a ARC CPU configuration that can be selected for the
ARC EM Starter Kit. The board support for this board will be
submitted separately to expidite review.
Change-Id: I2c85bdab6ea7bfb257e94e4c72b11b4568dbac19
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
This is external source code maintained somewhere else. Put it
under ext/ for clarity and maintainability.
Change-Id: I9e7c9d0948a2ba893006e316dc21d9b1a9edfa93
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Move away from native driver and use the UART driver provided
by QMSI.
All peripherals on Quark MCUs will use QMSI drivers developed
specifically for Quark and optimized for this MCU line.
Change-Id: If4e27f38736849ea3e12c269886e2a03d957b671
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we have QMSI sensor subsystem drivers, lets use them.
Change-Id: Icd301b6c044280b5b25d719b6dcc16d556a2ea8d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add I2C QMSI shim driver for sensor system based on QMSI 1.1
Origin: Original
Change-Id: I9c8efe49e8e9b7a5f8496fa49beb68e409148be7
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we have QMSI sensor subsystem drivers, lets use them.
Change-Id: I1340ba8930fc8676f7b706540a105250ce3e51b9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add QMSI 1.1 based GPIO sub-driver for sensor system.
Origin: Original
Change-Id: Ida5565a5911eb55651a11a4ac0b240c624f8e1ca
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we have QMSI sensor subsystem drivers, lets use them.
Change-Id: I1776178ad6fb984d6e293dbfa8bb1d718e4c2566
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Add SPI sub-driver for sensor system.
Use SPI irq number definitions already in Zephyr header file.
Origin: Original
Change-Id: I215db3acc535093dd75c0817cbe5af77e6e76e16
Signed-off-by: Baohong Liu baohong.liu@intel.com
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
On galileo, UART_0 IRQ is incorrectly mapped to IRQ 0
UART_0 IRQ should be mapped to IRQ 17 (same as UART_1 IRQ)
but NS16550 driver doesn't support mapping same IRQ for
different devices.
This is creating crashes when dumping profiler data on UART
CONSOLE (UART_1) with UART console enabled (UART in interrupt
mode)
This patch is disabling UART_0 in sample apps and adding a note
in the README file
This problem appeared due to following commit:
e643cede3a uart: add ISR callback mechanism for UART drivers
Since that commit, UART driver is setting the ISR for all
UART device instances when interrupt mode is enabled
Change-Id: Ic9d0207e5e5c7e3d8e8a8bf90f3132801bc6c2b1
Signed-off-by: Fabrice Olivero <fabrice.olivero@intel.com>
On Quark SE, using system timer as event timestamp creates
inconsistencies since the timer is handled by software in
timer_int_handler and tickless_idle_exit. So timestamp does not
reflect timing of certain events like timer IRQ.
This patch introduces the usage of RTC or AON counter as kernel
event logger timestamp
Change-Id: I070254446dd98dd448e119892c34abf12efca719
Signed-off-by: Fabrice Olivero <fabrice.olivero@intel.com>
By default, kernel event logger is using the system timer. But on
some platforms where the timer driver maintains the system timer
cycle accumulator in software, such as ones using the LOAPIC timer,
the system timer behavior leads to timestamp errors. For example,
the timer interrupt is logged with a wrong timestamp since the HW
timer value has been reset (periodic mode) but accumulated value not
updated yet (done later in the ISR).
This patch is adding the possibility to register a timer callback
function that will be used by the kernel event logger. For example,
on Quark SE, this allows using RTC or AON counter which accuracy is
sufficient and behavior more straight forward compared to system
timer.
Change-Id: I754c7557350ef29fc10701e62a35a5425e035f11
Signed-off-by: Fabrice Olivero <fabrice.olivero@intel.com>
If CFLAGS have spaces, the existing zephyrmake leaks part of it as
arguments for make. Instead of explicitly setting, just the export the
CFLAGS to make it visible to the inner call to make.
Change-Id: I7b083cbc19a49e8dede39333443c701567d214c0
Signed-off-by: Caio Marcelo de Oliveira Filho <caio.oliveira@intel.com>
Many test configs are the same, remove complexity and duplication by
using just one kernel config where applicable.
This removes the usage of ARCH which is a remnant from the days where
we had to specify the architecture of the board, the architecture is now
part of Kconfig and determined basded on the board configuration.
This will also make it easy adding new architectures to test cases without
having to add an architecture specific config file when it is actually not
needed, for example now that we will enable micro-kernel support on ARC.
Jira: ZEP-238
Change-Id: I143fa3c4629c58329cfeb0c761c7a896fc1ef63a
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
File and directories under ext/ are not original to Zephyr and have
different coding style.
Change-Id: Ie09eb324c35eb6e7be2cc3bcbc6ce6676376e346
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
when importing code from external sources, we do not want to fail
on checkpatch and want to run full sanity checks.
Using --exclude <dir> we should be able to exclude a list of well
defined locations in the tree that carry sources from other projects
with other styles.
Change-Id: I7d321e85eed6bc37d5c6879ae88e21d20028a433
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Attributes should have stored their own attribute handle after
registering service. Handle values are assigned to attributes after
registering service and stack has to copy them.
Fixes:
GATT TC_GAD_SR_BV_03_C PASS
Change-Id: I8463340960d663161d0f7990390e60f06a1c7259
Signed-off-by: Grzegorz Kolodziejczyk <grzegorz.kolodziejczyk@tieto.com>
ktseng