There're (at least) 2 UART TX interrupt causes: "tx fifo has more
room" and "transmission of tx fifo complete". Zephyr API has only
one function to enable TX interrupts, uart_irq_tx_enable(), so it's
fair to assume it enables interrupt for both conditions. But then
immediately after enabling TX IRQ, it will be fired with "tx fifo
has more room" cause. If ISR doesn't do anything to fill FIFO, on
some architectures, immediately after return from ISR, it will be
fired again (with no instruction progress in the main application
thread). That's exactly the situation with this test, and on ARM,
it leads to inifnite IRQ loop.
So, instead move call to uart_fifo_fill() inside ISR, and be sure
to disable TX IRQ after we transmitted enough characters.
Change-Id: Ibbd05acf96b01fdb128f08054819fd104d6dfae8
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I6c676bc6c5e850a8725785554cd535e32067f33e
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
ztest has a number of assert style macros and used a baseline assert()
that varies from the system definition of assert() so lets rename
everything as zassert to be clear.
Change-Id: I7f176b3bae94d1045054d665be8b5bda947e5bb0
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Coverity points out that uart_irq_update() return value
should be checked.
Coverity-CID: 166776
Change-Id: I3a754dae9e8f1563f4879e2fadfd89621785de8f
Signed-off-by: Qiu Peiyang <peiyangx.qiu@intel.com>
These were flagged by icx build.
Jira: ZEP-1864
Change-Id: I5b8fce64d9e20d768fabf02e2a799e9390e3679a
Signed-off-by: Jithu Joseph <jithu.joseph@intel.com>
Depending on test environment, termination character could
be '/r' instead of '/n'.
Enabling both possibilities.
Change-Id: I18b47e9055667e0a4f868416ee8d01226a879712
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Paul Sokolovsky