Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.
Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following update of LL clock driver to suport F4 series,
update dma driver to support LL clock driver API.
Change-Id: Ic8ecfe4f33109204f3b5f8c22bcb9c41de81531d
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Fix misspellings in Kconfig help text and made spelling of
RX and TX consistent (from reviewer comments)
Change-Id: Ie9d4c3863cd210e7a17b50a85a7e64156b6bf3d7
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The following warning occurs when !SYS_LOG_INF due to the fact
that these variables are only used for information purposes.
When logging is <INFO then the variables aren't utilised at all.
To fix this we're removing the variables completely and using
the direct calls from within the information prints instead.
drivers/dma/dma_stm32f4x.c: In function 'dma_stm32_dump_reg':
drivers/dma/dma_stm32f4x.c:196:11: warning: unused variable 'sfcr' [-Wunused-variable]
uint32_t sfcr = dma_stm32_read(ddata, DMA_STM32_SFCR(id));
^
drivers/dma/dma_stm32f4x.c:195:11: warning: unused variable 'sm1ar' [-Wunused-variable]
uint32_t sm1ar = dma_stm32_read(ddata, DMA_STM32_SM1AR(id));
^
drivers/dma/dma_stm32f4x.c:194:11: warning: unused variable 'sm0ar' [-Wunused-variable]
uint32_t sm0ar = dma_stm32_read(ddata, DMA_STM32_SM0AR(id));
^
drivers/dma/dma_stm32f4x.c:193:11: warning: unused variable 'spar' [-Wunused-variable]
uint32_t spar = dma_stm32_read(ddata, DMA_STM32_SPAR(id));
^
drivers/dma/dma_stm32f4x.c:192:11: warning: unused variable 'ndtr' [-Wunused-variable]
uint32_t ndtr = dma_stm32_read(ddata, DMA_STM32_SNDTR(id));
^
drivers/dma/dma_stm32f4x.c:191:11: warning: unused variable 'scr' [-Wunused-variable]
uint32_t scr = dma_stm32_read(ddata, DMA_STM32_SCR(id));
Change-Id: I91a0373ef6c9afa8a342181c0ab24bd58743300d
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Without this bit set, if we a pass ptr to a string such as:
"This is a string\n"
The DMA'ed output would be:
"TTTTTTTTTTTTTTTTTT"
Change-Id: I0186c95ddca0390596d22af2551dbfa6716a5082
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The device data structure is statically declared and referenced
on a per-controller basis during driver registration. Unfortunately,
due to using the same name (ddata) to initially declare as used
in individual functions, we accidentally referenced the main struct
by mistake due to a lack of local declaration. Let's prevent that
from happening again by using different name-spaces.
Change-Id: I9f7e5e7f95ee68d71aee70fa979e015ca2b5519e
Signed-off-by: Lee Jones <lee.jones@linaro.org>
The STM32 DMA controller supplies streams, which in turn provide a
selection of channels. The stream number is provided by the DMA API
through it's 'channel' argument, but the sub-channel (within the
stream) is specified on an application case by case bases via Kconfig.
Change-Id: Ib5bfdb80f4d616516850787e1402164807771c5e
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Some controllers contain channels with-in channels, or in the case
of the STM32 DMA controller channels within streams. Channels
will vary depending on application, so these need to be provided
on a use-case bases.
Change-Id: I4f5fe3ec5817583b95dc7f059b5dc57f937523c4
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Each controller contains a number of streams. Subsequently each
stream contains a number of channels. Channels are selectable
via the stream's control register.
Change-Id: Ib75d1377cb8fc38f27e4566b275343b2ffb8da65
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Commit c0bd8a0ce4 ("api: dma: dma api update") introduced some new APIs
and deprecated the old ones. Let's move to the new API before the old
calls are completely removed.
Change-Id: I21795fa20124f8101c56b0fceb0f0d9afd96b0f0
Signed-off-by: Lee Jones <lee.jones@linaro.org>
File include/misc/sys_log.h has been moved to include/logging/sys_log.h.
Change-Id: I011ca632396b574ae7e388b47fc2ba3a58fafc7b
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Currently only 1 is allowed. While we're at it, let's generify the
existing entries, since they could be used by all controllers, not
just QMSI.
Change-Id: Iec5d195fff239931b21a7584eb4b642b40f95be5
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Add few nop instructions to allow the DMA controller settle,
It takes time after starting the transfer to access the DMA
controller registers, so a few cycles are added, the minimal number
of cycles needed has been calculated using tests results on c1000
development board.
Jira: ZEP-1803
Change-Id: I1f8e8478f0350e1b6e4dd596b783dc4babc2d02b
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Some files made it through review process with full license header.
Change-Id: I2722b127c40b4b19500042c12e4fde85a165bae9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This driver currently only handles memory-to-memory transfers.
TODO: Add support for all types of transfers.
Change-Id: Ic9787dcca919a58fb11b48c9f6b6b371db88c3ea
Origin: Original
Maintained-by: Zephyr
Signed-off-by: Lee Jones <lee.jones@linaro.org>
This commit removes unnecessary CONFIG_SYS_POWER_DEEP_SLEEP protection
in shim drivers as QMSI 1.4 has introduced empty context save/restore
functions that can be called in Quark D2000, therefore keeping common
code at the shim driver level for Quark SE and D2000.
Change-Id: Ia2a466327f999668c6511c0193014e9151bff6ae
Signed-off-by: Juan Solano <juanx.solano.menacho@intel.com>
Update the qmsi dma shim driver based on the new dma api
interface.
Recently, a RFC was posted to update the dma api. The update
to dma api interface was already posted. This change is to
update the dma qmsi shim driver based on the dma api change.
It is using the new data structures and new api function names.
Jira: ZEP-873
Change-Id: If9a772c5ff1c2b10fca05172c48f75223bbf940e
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Signed-off-by: Sergio Rodriguez <sergio.sf.rodriguez@intel.com>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Change the included kernel header file from nanokernel.h
to kernel.h
Change-Id: I76cc952316430d618ea3ecb526d9bc2a99f04cef
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Add the necessary infrastructure to support power management for the
QMSI DMA driver. If deep sleep is supported, this driver supports
saving its context to be restored on resume.
Jira: ZEP-1005
Change-Id: I49f1f985eb0f250c777c6950178715fb794db537
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Update the QMSI drop we maintain in Zephyr, and fix the build where
needed:
- QM_SCSS_INT is renamed to QM_INTERRUPT_ROUTER;
- every member of QM_INTERRUPT_ROUTER was renamed as well;
- QM_IRQ_* renamed too, mostly added _INT at the end;
- some isr functions were renamed to keep their names consistent;
- build for x86 needs to define QM_LAKEMONT, as QM_SENSOR was for ARC.
Change-Id: I459029ca0d373f6c831e2bb8ebd52402a55994d1
Signed-off-by: Iván Briano <ivan.briano@intel.com>
Set DMA transfer to QM_DMA_TYPE_SINGLE for all channels.
This keeps the previous behavior as of QMSI 1.1.
In the future, we may consider adding support for using other DMA
transfer types. This, however, will demand adding new API to Zephyr's
dma.h .
Change-Id: I8071555190662a72279069ff9fce3d4b9e861629
Signed-off-by: Maciej Kuc <maciejx.kuc@intel.com>
Signed-off-by: Jesus Sanchez-Palencia <jesus.sanchez-palencia@intel.com>
Add typecasting in dma QMSI shim to avoid compilation error.
The DMA API and QMSI have their own definitions for the
dma configuration parameters, such as handshake_interface,
handshake_polarity, source/destination_transfer_width,
channel_direction, and source/destination_burst_length.
When a API is called, the shim driver will assign values
for the above-mentioned parameters to the configuration
variable(based on QMSI's definiton) from the values in the
variable provided by the caller based on API's definition.
Even though all these parameters have similiar definition
and values in both the generic API and QMSI, QMSI uses
its own names which are different from those definied in
the generic API. Without typecasting, the parameter value
assignment will cause compilation error(even though error
only happens for some compiler).
Jira: ZEP-1031
Change-Id: I147c690799514bd611cd9f88316f44346e095359
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Add DMA shim driver based on QMSI 1.1
In order to enable this driver, the following options must
be set.
CONFIG_DMA
CONFIG_DMA_QMSI
Jira: ZEP-354
Origin: Original
Change-Id: I604cbf34e90f7653b956a6e4d428424beee3ef87
Signed-off-by: Baohong Liu <baohong.liu@intel.com>
Erwan Gouriou