Commit Graph

5 Commits

Author SHA1 Message Date
Anas Nashif 46a5d1e5cb cleanup: include/: move dma.h to drivers/dma.h
move dma.h to drivers/dma.h and
create a shim for backward-compatibility.

No functional changes to the headers.
A warning in the shim can be controlled with CONFIG_COMPAT_INCLUDES.

Related to #16539

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-06-27 22:55:49 -04:00
Derek Hageman 59786b43b3 drivers: sam0: Fix deprecated instance macro usage
During conversion in #16815 a few device tree instance macro aliases
where missed (probably due to them existing to support future SoCs
and so not currently compiled), this fixes their usage.

Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-06-24 07:21:26 -04:00
Kumar Gala a2693975d7 dts: Convert from DT_<COMPAT>_<INSTANCE>_<PROP> to DT_INST...
Change code from using now deprecated DT_<COMPAT>_<INSTANCE>_<PROP>
defines to using DT_INST_<INSTANCE>_<COMPAT>_<PROP>.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-06-14 08:02:15 -05:00
Derek Hageman 64e02021ee drivers: dma: sam0: Implement get_status API
Implement the get_status DMA API for the SAM0 DMA controller.
The busy field is set only when the selected channel is
actively transferring data (i.e. both enabled and selected by the
arbiter).  The direction field is left unset, since that
information is not normally retained by the DMA controller.

Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-05-30 17:18:44 -04:00
Michael Hope ba21de582b drivers: dma: Add SAM0 DMAC driver
This adds support for the SAM0 DMA Controller (DMAC).  Chained
transfer are not currently implemented.

Tested with tests/drivers/dma/loop_transfer and custom modifications
to that test using three parallel reloading channels.  Also tested
with a trivial program that did memory->serial.

Signed-off-by: Michael Hope <mlhx@google.com>

[hageman@inthat.cloud: Rebased and updated commit message]
Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-05-02 19:20:12 -05:00