Commit Graph

142 Commits

Author SHA1 Message Date
Michał Barnaś 94458f88b9 ec_host_cmd: add eSPI peripheral for the host commands
This commit adds the support for host commands being transported
by the eSPI subsystem.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2022-11-18 10:11:40 +01:00
Tim Lin 0789442132 ITE: soc: chip_chipregs: Access registers using structure method
Access registers using structure method.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-11-09 10:44:29 +01:00
Tim Lin b3f46ccaec ITE: cleanup: soc: chip_chipregs: Rename the structure name of register
Rename the structure of flash_it8xxx2_regs to smfi_it8xxx2_regs.

Signed-off-by: Tim Lin <tim2.lin@ite.corp-partner.google.com>
2022-11-09 10:44:29 +01:00
Michał Barnaś bcd4230d04 espi: auto enable the ESPI SAF XEC based on the device tree
The SAF XEC driver for eSPI was not enabled by default so sample
code for espi was failing. This commit changes the behavior to match
current scheme of enabling the drivers based on the status of required
device tree nodes.

Signed-off-by: Michał Barnaś <mb@semihalf.com>
2022-11-08 20:13:22 +00:00
Dino Li 8665db1dab espi: it8xxx2: reset PLTRST# virtual wire signal during eSPI reset
The PLTRST# virtual wire signal's reset signal is eSPI Reset#.
But it8xxx2 didn't enable the feature by default. This change
will enable the feature at default.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-11-07 09:50:27 +01:00
Jay Vasanth d0fe965b9f drivers: espi_saf: Add Microchip MEC172x eSPI SAF version 2 driver
Microchip MEC172x has a modified eSPI SAF hardware implementation.
Hardware changes include multiple clock dividers for each SPI
flash device and data transfer using QMSPI local DMA.
espi reset interrupt is made a higer priority in MEC172x devicetree
because espi reset event resets all espi hardware and we don't
to want to service any other espi interrupt blocks when espi reset
occurs.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-10-28 14:29:46 -05:00
Jun Lin 82a887c98d driver: eSPI: npcx: support multiple bytes mode for Port80
eSPI PUT_IOWR_SHORT protocol can send 1/2/4 bytes of data in a single
transaction. This allows the host to send max 32-bits Port80 code
at one time. This CL sets bits OFS0_SEL~OFS3_SEL in the DPAR1 register
to let the EC hardware put the full Port80 code to DP80BUF FIFO.
It also groups the N-byte code into a single 32-bits variable when
necessary by analyzing the offset field in the DP80BUF register.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-10-20 15:41:22 +02:00
Gerard Marull-Paretas 178bdc4afc include: add missing zephyr/irq.h include
Change automated searching for files using "IRQ_CONNECT()" API not
including <zephyr/irq.h>.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-10-17 22:57:39 +09:00
Jun Lin ea066d35b0 driver: eSPI: drop interrupts enabling during driver initialization
Host interface interrupts should be enabled explicitly via eSPI API
after the eSPI configuration and callbacks are set.
If we enable them during driver initialization and the host sends a eSPI
transaction before the eSPI configuration and callbacks are set, we may
encounter unexpected behavior.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-10-07 10:01:09 +02:00
Andrei Emeltchenko a657abae23 espi: Fix gpio_manage_callback() logic
espi_manage_callback() returns -EINVAL if it could not remove
callback. However if the list is empty success is returned when trying
to remove callback.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2022-10-04 14:10:05 +00:00
Jay Vasanth e46c56e117 espi: mec15xx: add pinctrl for mec15xx/mec1501 espi
Remove pinmux calls and add pinctrl support for mec15xx
and mec1501 espi. Update board dts, pinmux and espi driver
files.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-09-21 18:05:32 +00:00
Mulin Chao 839031271f driver: espi: npcx: add the controller attached flash sharing API
Add the flash channel support by implementing the controller attached
flash sharing APIs, including flash_read, flash_write, and flash_erase.
For flash_read, the max data payload the module can support is 64 bytes
in one transaction.
For flash_write, the max data payload the module can support is 16
bytes in one transaction.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-09-09 16:30:51 -04:00
Diwakar C 6c6c496a82 espi: driver: Config spare espi vw register to OCP index
USBC port (Port 0/1/2/3) OCP (Over Current Protection) status
should be sent to PCH over eSPI VW index 0x50h. But there is
no dedicated VW register mapped to VW index 0x50h.
In this patch, configuring spare VW register SMVW06 to OCP VW
index 50h.

Signed-off-by: Diwakar C <diwakar.c@intel.com>
2022-09-09 10:11:02 +02:00
Vijay Hiremath f262b795b8 eSPI: npcx: Enable platform specific Virtual Wire GPIOs
Added code to enable platform specific Virtual Wire GPIOs. With this
change, able to send the USB-C overcurrent Virtual Wire event to
Meterolake SOC.

Signed-off-by: Vijay Hiremath <vijay.p.hiremath@intel.com>
2022-09-02 10:36:24 +00:00
Henrik Brix Andersen 88614ecf4f drivers: espi: check if clock device is ready before accessing
Add check for device_is_ready() before accessing clock control devices.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2022-08-09 17:16:16 +02:00
Kumar Gala 8fb2210cfb emul: remove name param from bus register APIs
Rework the <BUS>_emul_register calls to not pass the name param.  The
name param is only used for logging and we can get it from the
struct <BUS>_emul instead.

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-19 15:52:36 -05:00
Kumar Gala 7d95eb0ac9 drivers: espi_emul: Fix formatting
Fix formatting of emul_espi_driver_api initializer

Signed-off-by: Kumar Gala <galak@kernel.org>
2022-07-19 13:21:45 -05:00
Aaron Massey fc98549952 emul: Use DEVICE_DT_GET instead of DT_LABEL
DT nodes aren't guaranteed to define a label property. But emulated bus
controllers currently make use of this property to dispatch to the
associated emulator.

Have emulated bus controllers use DEVICE_DT_GET(node_id) to dispatch to
right target peripheral emulator. This also change makes emul_get_binding
and device_get_binding synonymous in behavior with respect to their
parameters.

This also strictly enforces a 1:1 correspondence between invocations of
DEVICE_DT_DEFINE and EMUL_DEFINE.

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2022-07-19 11:43:30 -05:00
Aaron Massey 76ae0ba270 emul: Remove or declare unused args
In several locations of the emulator code there are unused function
arguments that were never caught.

Declare these as unused or remove the unused function parameters entirely.

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2022-07-19 11:43:30 -05:00
Aaron Massey 9d7b9dc807 emul: Simplify emulator bus initialization and API
Allow emulator creators to write an init function that can be used
across multiple busses so as to reduce the boilerplate and cognitive
load in creating an emulator.

Part of this change includes allowing access to the emul struct from a
field in a {bus}_struct api (e.g. i2c_struct), which removes the need for
sporadic usages of CONTAINER_OF to access the emul struct.

Overall, this change simplifies and reduces the amount of boilerplate
code to get a device emulator up and running, thus reducing excise work
to writing tests.

TEST=twister on accel,espi, and eeprom drivers tests

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2022-07-19 11:43:30 -05:00
Aaron Massey 1028459afd emul: Run clang-format
Run clang-format on all files touched by improved emulator API pull-request
that allowed access to the target device emulator from its bus api without
CONTAINER_OF usage.

drivers/i2c/i2c_emul.c
drivers/spi/spi_emul.c
include/zephyr/drivers/emul.h
include/zephyr/drivers/espi_emul.h
include/zephyr/drivers/i2c_emul.h
include/zephyr/drivers/spi_emul.h
subsys/emul/emul.c
subsys/emul/emul_bmi160.c
subsys/emul/espi/emul_espi_host.c
subsys/emul/i2c/emul_atmel_at24.c

TEST=twister on accel,espi, and eeprom drivers tests

Signed-off-by: Aaron Massey <aaronmassey@google.com>
2022-07-19 11:43:30 -05:00
Johann Fischer 5e5ea9a21d drivers: use unsigned int for irq_lock()
irq_lock() returns an unsigned integer key.
Generated by spatch using semantic patch
scripts/coccinelle/irq_lock.cocci

Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
2022-07-14 14:37:13 -05:00
Anas Nashif 49b36ead95 drivers: add mising braces to single line if statements
Following zephyr's style guideline, all if statements, including single
line statements shall have braces.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2022-07-06 11:00:45 -04:00
Mulin Chao 33c7119e87 drivers: espi: host_subs: add pinctrl driver support
Replace soc-specific pin functions with Zephyr pinctrl api functions for
pin-mux configuration in npcx eSPI and host_subs driver.

Signed-off-by: Mulin Chao <mlchao@nuvoton.com>
2022-05-12 14:24:03 -05:00
Jun Lin 51978d9d61 driver: eSPI: npcx: workaround the errata rev1_2, No.3.10
Enabling an eSPI channel (r.g. Peripheral Channel, Virtual Wire Channel,
etc.) during an eSPI transaction might (with low probability) cause the
eSPI_SIF module to transition to a wrong state and therefore response
with FATAL_ERROR on an incoming transaction.
This CL workarounds this issue by clearing the bit 4 of NPCX eSPI
specific register#2.

Signed-off-by: Jun Lin <CHLin56@nuvoton.com>
2022-05-12 09:21:24 +02:00
Gerard Marull-Paretas fb60aab245 drivers: migrate includes to <zephyr/...>
In order to bring consistency in-tree, migrate all drivers to the new
prefix <zephyr/...>. Note that the conversion has been scripted, refer
to #45388 for more details.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2022-05-06 19:58:21 +02:00
Dino Li 3f6be01484 it8xxx2: espi/kbc: read kbc event type before read input buffer
Host might send command or data immediately after EC read the
KBC input buffer (IBF gets cleared).
This change make sure EC won't get wrong event type in IBF ISR.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-05-06 11:31:13 +02:00
Jose Alberto Meza 09ca5cc9cb drivers: espi: Correct default eSPI to UART mapping
Correct default mapping for eSPI UART virtual port to SoC UART
for MEC172x.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-04-22 10:46:18 -05:00
Bartosz Bilas 6540964e55 drivers: espi: xec_v2: remove superfluous default n for boolean
bool symbols implicitly default to n so
there is no need to redundant those values.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-04-15 10:32:24 -07:00
Bartosz Bilas 4c033df0f5 drivers: espi: xec: remove superfluous default n for boolean
bool symbols implicitly default to n so
there is no need to redundant those values.

Signed-off-by: Bartosz Bilas <bartosz.bilas@hotmail.com>
2022-04-15 10:32:24 -07:00
Jay Vasanth 32bc328f8b espi: mec172x kbc: Enable custom configs
Enable custom configs for KBC IBF event data and KBC
OBF callback from ISR.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-13 08:52:57 -05:00
Jay Vasanth b530be4591 espi: mec172x: kbc0_ibf_isr: read sts before data
Read KBC Status register before reading KBC Data register
in kbc0_ibf_isr; since read data will clear status.

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-13 08:52:57 -05:00
Jay Vasanth 3abfb58741 espi: mec172x: Read ACPI EC data in IBF ISR
Handle ACPI EC0 and ACPI EC1 IBF ISR by reading input
data in the ISR

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-13 08:52:57 -05:00
Jay Vasanth 9431e7d128 espi: mec172x: (ACPI EC0 / custom) opcodes support
Add support for ACPI EC0 and custom opcodes

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-13 08:52:57 -05:00
Jay Vasanth e24e643977 espi: align Mec172x ec_host_cmd_sram buffer
Make ec_host_cmd_sram[] buffer align on a 8-byte
boundary

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-04-13 08:52:57 -05:00
Jose Alberto Meza 33fde4b10a drivers: espi: xec: mec172x: Handle eSPI bus host enable
Add eSPI bus host enable/disable events from eSPI host.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-04-05 11:19:03 +02:00
Dino Li e2ce171bed it8xxx2: espi: fill OOB header at driver level
With this change, app code has not to fill/prepare OOB header.
fixes #43568

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-04-01 13:30:33 +02:00
Nazar Kazakov f483b1bc4c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-18 13:24:08 -04:00
Tomasz Bursztyka 9a18fdea3f drivers: Check and fix device const qualifier on ISR
Re-running the script that checks for the const qualifier missing on
struct device ISR's parameter.

The script also changes the parameter 'arg' to 'dev' when relevant.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2022-03-16 12:33:12 +01:00
Dino Li a39f640b54 it8xxx2: espi: add support for CONFIG_ESPI_OOB_CHANNEL_RX_ASYNC
This makes the driver to support the configuration option.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-03-16 10:26:22 +01:00
Nazar Kazakov 9713f0d47c everywhere: fix typos
Fix a lot of typos

Signed-off-by: Nazar Kazakov <nazar.kazakov.work@gmail.com>
2022-03-14 20:22:24 -04:00
Peter Marheine 1cf884786b drivers: it8xxx2: fix GPIO interrupt enables
gpio_pin_interrupt_configure asserts that one of GPIO_INT_ENABLE or
_DISABLE is specified by the caller, and also that GPIO_INT_EDGE is
requested if both states (GPIO_INT_TRIG_BOTH) should interrupt. This
change corrects the misuses in it8xxx2 drivers that cause assertion
failures.

When assertions are disabled the existing code works correctly because
the it8xxx2 GPIO driver assumes that a pin interrupt should be enabled
if _DISABLE is not requested, and the driver only supports edge
triggers but assumes the absence of GPIO_INT_MODE_LEVEL indicates
an edge trigger was requested.

Signed-off-by: Peter Marheine <pmarheine@chromium.org>
Change-Id: I1aaee190ec4cf063f36e25c0c293a91d280e71bb
2022-03-11 11:00:22 +01:00
Jose Alberto Meza ee1653985d drivers: espi: xec: mec172x: Handle eSPI peripheral channel error
Handle eSPI periperal channel error to avoid continous interrupt
beyond the bus error.

Whenever an eSPI access causes an internal bus error,
PC_BUS_ERROR bit is set, it remains set until cleared by written
with an 1.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-03-10 13:25:13 -05:00
Jay Vasanth f8130d5ce3 espi: updated MEC172x espi module for pinctrl
Changes to espi module to support pinctrl

Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-03-07 11:03:06 +01:00
Dino Li 7a9a5cec0b it8xxx2: espi: reduce h2ram pool size
This saves 1280 bytes memory space by default eSPI configurations.

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-03-02 09:45:14 -06:00
Jose Alberto Meza ace858bc29 drivers: espi: xec: mec172x: Fix compilation when OOB RX async is enabled
Correct MEC172x OOB register access that causes compilation error,
Use device-tree-based register access instead of HAL access
This occurs whenever CONFIG_ESPI_OOB_CHANNEL_RX_ASYNC is
enabled.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-02-24 08:40:07 -06:00
Dino Li 36164c29c1 espi: it8xxx2: enable configuration of Chromebook
This enables the below configuration so the AP and EC are able to
communicate over eSPI:

CONFIG_ESPI_PERIPHERAL_EC_HOST_CMD
CONFIG_ESPI_PERIPHERAL_ACPI_SHM_REGION
CONFIG_ESPI_PERIPHERAL_CUSTOM_OPCODE

Signed-off-by: Dino Li <Dino.Li@ite.com.tw>
2022-02-21 22:01:48 -05:00
Jose Alberto Meza 00304fbe2d drivers: espi: xec: support for eSPI slaves with long initializations
Add Kconfig switch to disable automatic eSPI slave boot
acknowledgement.
This allows to perform lenghty operations before continue any eSPI
handshake with eSPI master.

Required for eSPI SAF boot configuration.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2022-02-21 20:55:48 -05:00
Wealian Liao 6d6c5e1155 drivers: npcx: Drop DRV_CONFIG/DRV_DATA usage
Stop using DRV_CONFIG/DRV_DATA macros and use dev->data and dev->config
instead.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2022-01-28 10:06:05 +01:00
Wealian Liao 3565f71a72 drivers: npcx: Correct the macro parentheses
This corrects the following:
1. The priority of type cast is lower than member access. So don't need
the redundant parentheses.
2. The macro should be added to the parentheses.

Signed-off-by: Wealian Liao <WHLIAO@nuvoton.com>
2022-01-28 10:06:05 +01:00