Commit Graph

36 Commits

Author SHA1 Message Date
Manuel Arguelles 4fbf940019 drivers: counter: support NXP S32 System Timer Module
NXP S32 System Timer module includes a 32-bit count-up timer and four
32-bit compare channels with a separate interrupt source for each
channel. The timer is driven by the module clock divided by an 8-bit
prescale value.

Signed-off-by: Manuel Arguelles <manuel.arguelles@nxp.com>
2022-11-30 11:29:39 +01:00
Piotr Kmiecik 0acd68247f drivers: ace_v1x wallclock driver
Wallclock driver with functionality required by ACE v1x base firmware.

Signed-off-by: Piotr Kmiecik <piotrx.kmiecik@intel.com>
2022-09-06 17:44:03 +02:00
Jimmy Zheng a2cc4b702f drivers: counter: add Andes atcpit100 counter driver
atcpit100 counter driver support 4 32-bit PIT channel, using channel 3 as
the default counter.

Signed-off-by: Jimmy Zheng <jimmyzhe@andestech.com>
2022-08-26 11:55:36 +02:00
Glauber Maroto Ferreira af5310d500 esp32: drivers: counter: update build references
Updates build references of the Counter API
implementation based on Espressif's General
Purpose Timers to differentiate from the one
based on RTC.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-08-04 15:30:18 +02:00
Glauber Maroto Ferreira dbbfcfc22d esp32: driver: counter: add RTC-based implementation
add RTC-based implementation of the counter driver.

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2022-07-27 09:48:33 +02:00
Jan Peters 253cec5c95 drivers: counter: add driver for NXP QTMR counters
The driver is implemented using the MCUXpresso SDK.

Signed-off-by: Jan Peters <peters@kt-elektronik.de>
2022-05-03 20:41:23 -05:00
Kent Hall ba37d5935e drivers: counter: Counter API implementation for STM32F4 Series (TIMER).
- Shim for counter API using LL_TIM driver.
- Supports all general-purpose (TIMx) timers.

Signed-off-by: Kent Hall <kjh2166@columbia.edu>
2021-12-11 14:20:17 -05:00
Pieter De Gendt 4d161a3b23 drivers: counter: NXP SNVS rtc: Add support for NXP imx SNVS RTC
Adds a driver using the SNVS high power and optionally low power
RTC instances. A device specific function `mcux_snvs_rtc_set` is
provided to update the current counter value.

Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
2021-12-07 09:45:43 -06:00
Toby Firth 893bfc0fc1 drivers: counter: added ctimer driver for lpcexpresso55s69
Added shim driver for the CTIMERs for the lpcexpresso55s69 board.

Fixes: #22705

Signed-off-by: Toby Firth <tobyjfirth@gmail.com>
2021-08-24 17:13:22 -04:00
Kieran Mackey 94e006f0fc drivers: counter: add driver for Microchip MCP7940N RTCC
Microchip MCP7940N is a Real-Time Clock/Calendar. It operates on a I2C
bus. It can be used to set a calendar time and has two alarm channels.
When an alarm is asserted the state of the MPF pin of the MCP7940N will
change (depending on gpio active high/active low setting) to trigger an
interrupt.

Signed-off-by: Kieran Mackey <kieran.mackey@lairdconnect.com>
2021-07-30 19:51:29 -04:00
Piotr Mienkowski 1145986096 drivers: Add Atmel SAM counter (TC) Driver
Add basic counter driver based on Timer Counter (TC) module for Atmel
SAM family.

Remarks:
- The driver is not thread safe.
- The driver does not implement guard periods.
- The driver does not guarantee that short relative alarm will trigger
  the interrupt immediately and not after the full cycle / counter
  overflow.

Tested on Atmel SMART SAM E70 Xplained board

Origin: Original

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2021-07-26 05:13:40 -04:00
Mahesh Mahadevan 5c818f7f55 drivers: counter: Add counter for rt600
Add a RTC based counter for MXRT600

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2021-07-16 18:56:15 -04:00
Glauber Maroto Ferreira c344d0d74d esp32: drivers: counter: add support for general-purpose counters
Adds support for ESP32 general-purpose Counters

Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
2021-03-03 13:02:02 +01:00
Henrik Brix Andersen d31a1dc91b drivers: counter: add driver for the Xilinx AXI Timer
Add counter driver for the Xilinx AXI Timer v2.0 IP.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-17 19:30:20 -05:00
Hake Huang f6677b77fa counter: add pit counter driver
add Kinetis PIT as counter driver

Signed-off-by: Hake Huang <hake.huang@oss.nxp.com>
2020-08-21 14:27:59 -05:00
Filip Zajdel 33eabf6fc7 drivers: counter: Add native_posix counter hardware model and driver
Adds native_posix hw counter model and the counter driver.
Functionality is needed by software which is tested
on native_posix and has dependency on counter.
Hardware model was developed similarly to HW timer model.
The counter driver wraps HW counter functions and exposes
basic functionalities: starting, stopping, setting and cancelling
single channel alarms.
Code was tested against: tests/drivers/counter/counter_basic_api.

Signed-off-by: Filip Zajdel <filip.zajdel@nordicsemi.no>
2020-07-27 13:25:50 +02:00
Peter A. Bigot e444274e95 drivers: counter: add Maxim DS3231 support
The DS3231 is an I2C real-time clock with internal temperature
compensated oscillator, maintaining civil time to 1 s precision with
nominal 2 ppm accuracy from 0-40 Cel.

The basic functionality is exposed as a counter that is always running
at 1 Hz.  Much more functionality is exposed as driver-specific API,
including the ability to translate between the time scale of the DS3231
and the time scale of the Zephyr uptime clock.  This allows correlation
of events in the system clock to UTC, TAI, or whatever time scale is
used to maintain the DS3231.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-05-07 19:45:06 +02:00
Henrik Brix Andersen 85c996b016 drivers: counter: add NXP Kinetis LPTMR driver
Add counter driver for the NXP Kinetis Low Power Timer (LPTMR). The
driver can be configured either as 16 bit counter or 16 bit pulse
counter.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-03-27 11:17:58 -05:00
Andrei Emeltchenko a4ba22c627 drivers: counters: Fix coding style issues
Replace zephyr_library_sourceS_ifdef with zephyr_library_sources_ifdef
and follow cmake coding style.

Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
2019-09-24 11:40:53 -07:00
Anas Nashif 27ff3f15f6 drivers: counter: remove qmsi counter driver
No users of this driver after dropping quark platforms.

COUNTER_0_NAME was only defined by the QMSI driver and was defined but
not used in DTS fixup files of ateml_sam0 SoCs. Removing those leftover
defines as well.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-09-18 11:06:18 -05:00
Tomasz Bursztyka 41c93a589c driver/counter: Add support for Microchip's XEC basic timer devices
Such basic timer is found on MEC150x for instance.
Since instances have dedicated data, let's define specifice instance
based on unique DT base address definition.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-09-14 12:13:49 +08:00
Loic Poulain 41bfeb54c2 drivers: counter: Add NXP MCUX GPT counter driver
Add driver for General Purpose Timer module which can act as a counter.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
2019-07-01 11:53:07 -05:00
Charles E. Youse 783a43e265 drivers/counter/counter_cmos.c: implement counter with PC AT "CMOS" RTC
Enable use of the PC/AT "CMOS" RTC as a simple 1Hz counter.

Signed-off-by: Charles E. Youse <charles.youse@intel.com>
2019-06-19 15:23:47 -07:00
Piotr Mienkowski abbd952d2b drivers: Add counter driver (RTCC) for SiLabs Gecko SoCs
This commit adds counter driver based on RTCC module for SiLabs Gecko
SoCs.

Tested with SLWSTK6061A / BRD4250B wireless starter kit.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-06-10 22:27:25 -04:00
Derek Hageman a4f3e628e5 drivers: counter: Add SAM0 basic counter support
This adds support for the basic timer counter (TC) found on SAM0
series parts.  This driver only supports running the counter
in 32 bit wide mode.  Since this mode explicitly slaves the odd
counters to the even ones, only instances of the even ones are
defined.

Tested with tests/drivers/counter/counter_basic_api on SAMD21.

Signed-off-by: Derek Hageman <hageman@inthat.cloud>
2019-05-28 09:23:44 -04:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Erwan Gouriou 458226e1f7 drivers/counter: stm32: Provide STM32 RTC driver using counter API
Provides a STM32 RTC driver using new counter API.
Driver does not support wrap related functions (set, get, ..)

Fixes #11373

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2019-02-07 16:14:00 -05:00
Kumar Gala 36427f8bbb drivers: timer: Move Dual Timer API to unified interface
The CMSDK Dual Timer can be used as a timer or as a counter.
The unified interface proposed in #8340 unifies counter.h and rtc.h to
provide a common interface.

This patch modifies the timer implementation of the dual timer to
make it compliant with the new proposed interface.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-07 16:14:00 -05:00
Kumar Gala 6fca18de60 drivers: timer: Move Timer API to unified interface
The CMSDK Timer can be used as a timer or as a counter.
The unified interface proposed in #8340 unifies counter.h and rtc.h to
provide a common interface.

This patch modifies the timer implementation of the single timer to
make it compliant with the new proposed interface.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-02-07 16:14:00 -05:00
Maureen Helm eb338915bb drivers: counter: Introduce mcux rtc shim
Adds a shim layer around the mcux rtc driver to adapt it to the zephyr
counter interface. Portions of this driver are reused from the existing
rtc driver in drivers/rtc/rtc_mcux.c.

The hardware supports a single alarm only and a fixed wrap value.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-07 16:14:00 -05:00
Stanislav Poboril f51ef0551c imx: Add IMX EPIT driver for i.MX socs
Add shim driver for i.MX EPIT (Enhanced Periodic Interrupt Timer)
peripheral which can be used for i.MX6SoloX, i.MX7D and other i.MX socs.

Origin: Original

Signed-off-by: Stanislav Poboril <stanislav.poboril@nxp.com>
2019-02-07 16:14:00 -05:00
Savinay Dharmappa aa15f3973a drivers: rtc_qmsi: Move rtc driver apis to unified interface
patch modifies rtc apis to unified interface.

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2019-02-07 16:14:00 -05:00
Krzysztof Chruscinski da0d9bab2d drivers: counter: Counter API implementation for nRF Series (RTC).
Shim for counter API using nrfx_rtc driver.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2019-02-07 16:14:00 -05:00
Krzysztof Chruściński 6b4ff1252a drivers: counter: Counter API implementation for nRF Series (TIMER).
Shim for counter API using nrfx_timer driver.

Signed-off-by: Krzysztof Chruściński <krzysztof.chruscinski@nordicsemi.no>
2019-02-07 16:14:00 -05:00
Adithya Baglody b0db28b512 drivers: Cmake: Add __ZEPHYR_SUPERVISOR__ macro for driver files.
Normally a syscall would check the current privilege level and then
decide to go to _impl_<syscall> directly or go through a
_handler_<syscall>.
__ZEPHYR_SUPERVISOR__ is a compiler optimization flag which will
make all the system calls from the driver files directly link
to the _impl_<syscall>. Thereby reducing the overhead of checking the
privileges.

In the previous implementation all the source files would be compiled
by zephyr_source() rule. This means that zephyr_* is a catchall CMake
library for source files that can be built purely with the include
paths, defines, and other compiler flags that all zephyr source
files uses. This states that adding one extra compiler flag for only
one complete directory would fail.
This limitation can be overcome by using zephyr_libray* APIs. This
creates a library for the required directories and it also supports
directory level properties.
Hence we use zephyr_library* to create a new library with
macro _ZEPHYR_SUPERVISOR_ for the optimization.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-05-15 17:48:18 +03:00
Sebastian Bøe 12f8f76165 Introduce cmake-based rewrite of KBuild
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.

Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.

This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.

For users that just want to continue their work with minimal
disruption the following should suffice:

Install CMake 3.8.2+

Port any out-of-tree Makefiles to CMake.

Learn the absolute minimum about the new command line interface:

$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..

$ cd build
$ make

PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html

Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00