Commit Graph

29 Commits

Author SHA1 Message Date
Anas Nashif b46f9db04b spi: use global init priority
Do not have priority per IP, use one config instead.

Change-Id: Ieb2923d4749a294e2a1c677d47d56a14cee3f36d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-04-22 20:46:29 -04:00
Vlad Lungu c36daba63d spi: intel: fix port 1 pin setup
Currently, the /CS pin is deasserted by _spi_config_cs() and
the pinmux driver sets it as an input afterwards. Later, setting
the /CS pin to an output via pinmux_dev asserts it.

Setting the SPI port 1 pins in the pinmux driver saves a few lines
of code. Moving the SPI init after pinmux init keeps the /CS pin as
configured by the SPI driver.

Change-Id: I4c587ba0a6983cd89dfb5ecedb2914335e86313b
Signed-off-by: Vlad Lungu <vlad.lungu@windriver.com>
2016-04-16 21:14:43 +00:00
Dmitriy Korovkin 977ba05d53 galileo: Enable PCI enumeration
If an external PCIe card inserted into Galileo board, the
devices I/O addresses may differ from the preconfigured ones.
For this reason PCI enumeration needs to be enabled.

Change-Id: I54b5ef9149f9eda0a390909a433b0e13a3dd7ecd
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-04-08 16:02:44 +00:00
Daniel Leung 5e886b2748 gpio/sch: remove kconfigs that are SoC specific
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.

Change-Id: Ib8158f00a6c6616360ddbcf63981f1a85911c1b9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-31 23:17:23 +00:00
Dmitriy Korovkin d78a2e34d6 galileo: Fix SPI driver init level
On Galileo Gen2 board SPI uses GPIO pin for CS.
Thus spi_intel driver must be initialized after gpio_dw,
so it's init level must be more that gpio_dw's one.

Change-Id: If2e5fb1106afe01e5567cf3fe72063bdc94ad3d2
Signed-off-by: Dmitriy Korovkin <dmitriy.korovkin@windriver.com>
2016-03-31 23:17:00 +00:00
Daniel Leung cb83db8c74 i2c/dw: remove kconfigs that are SoC specific
Remove those kconfig options that are SoC specific, and should not be
configurable via kconfig.

Change-Id: Ia62888838877da4627419bd36c261d5254761acd
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-31 01:11:23 +00:00
Daniel Leung 8f6068e9d8 serial/ns16550: make IRQ triggering condition a SoC decision
The IRQ triggering condition should be specified by SoC as it is
a decision for hardware design. This should not be configurable
in kconfig.

The default is to be triggered on rising edge, just as the same
old kconfig did.

Change-Id: If59d88a30711eb8e03d9cc4f409055cefe1995c5
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-30 13:38:34 +00:00
Daniel Leung 546b8ade37 refactor common driver initialization priorities
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.

The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.

This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.

Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.

Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-28 15:58:29 -07:00
Daniel Leung cecc4b0fb5 pinmux: remove base address and number of pins from kconfig
The pinmux base address and number of pins are now defined in SoC or board
header files instead of specifying them in kconfig. This is because
the pinmux ties directly to the SoC (or board expanders) so the base
address and number of pins do not need to be configurable in kconfig.

Change-Id: Ib6090d7d022b491f3fe8f522858281504c6302bb
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-28 15:58:29 -07:00
Daniel Leung c215ef7213 kconfig: add conditions to device init priority defaults
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.

Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Daniel Leung 8df10d4584 kconfig: untangle ordering and dependencies
There are two major issues with the kconfig:

() Some of the config options have incorrect dependencies inside help
   under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.

() Since the SoC and board specific kconfig files are parsed first,
   the help screen would say, for example, CONFIG_SPI is defined at
   arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
   the actual config is defined in drivers/spi/Kconfig.

These cause great confusion to users of menuconfig/xconfig.

To fix these, the SoC and board defaults are now to be parsed last.

Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.

And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.

Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-26 20:36:32 -04:00
Vinicius Costa Gomes 41529e20e6 pinmux: Move the Galileo board to the pinmux model
Change-Id: Ib58b1ea56d6c82c2e055bf4cb0df4b07b0dd936e
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-25 06:17:33 -04:00
Vinicius Costa Gomes facfc59464 pinmux: Convert return codes to errno.h
Before moving pinmux related code to 'drivers/pinmux' fix their return
codes to be consistent with the rest of the API.

Change-Id: Ie84f64e93745d44bef8b9d2119f6a05cdc8cb8c4
Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@intel.com>
2016-03-19 10:44:38 +00:00
Andre Guedes 5f1988f284 pinmux: Change returning type from pinmux.h APIs
All driver APIs (i2c, spi, gpio, etc.) return 'int' type, but pinmux
APIs. So this patch changes the returning type from 'uint32_t' to
'int' from include/pinmux.h and fixes all pinmux drivers according.

Besides keeping consistency between all drivers APIs, this patch is
also applicable for the errno.h code transition. Pinmux drivers will
return negative errno.h codes so returning 'int' is more suitable
than 'uint32_t'.

Change-Id: I2a6e92d567a0e21fec363226da6197df94657d4b
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
2016-03-16 19:46:05 +00:00
Daniel Leung b8b6fb5747 boards: make individual boards dependent on SoC selections
This makes the board selection dependent on SoC selection. For example,
select Atmel SAM3 will only allow "Arduino Due" as board selection.
This disallows incompatible SoC/board combination, like K64F with
Arduino Due.

JIRA: ZEP-106
Change-Id: I675961cf33db5a0058fc68f14c8f16978f9c6b95
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2016-03-16 01:38:06 +00:00
Jeff Blais 59359595fe pinmux: Expand the pin function/mode parameter size
The pinmux API was modified to expand the meaning of the 'func' argument
to allow it to represent more than a pre-configured function.  This was done
to reasonably accommodate a larger range of pin configuration options
offered by other MCUs, such as the Freescale K64 (up to 8 pin functions,
plus interrupt, pullup/down, drive strength, open-drain, slew rate, etc.).

This allows bit fields to be used to define various settings.

Change-Id: I2b216b822c6bae7133eed01c8c3339bb47b6c5db
Signed-off-by: Jeff Blais <jeff.blais@windriver.com>
2016-03-09 06:39:16 +00:00
Benjamin Walsh fd1aa8575b x86: move reboot via RST_CNT from galileo to generic x86
That implementation is not galileo-specific, but rather a generic way of
rebooting an x86 target. Needs SoC support.

Change-Id: I9c3374a8ab57a624d9d9b7090260c5b11fe4e773
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-25 16:52:27 +00:00
Dan Kalowsky 9ccd5ce785 adc : ti : only one instance
There can only be one instance of an ADC, but we have code setup for
multiple.

Change-Id: I94eae2450bdc6b138ebad66f80a7c451cefe32a9
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>
2016-02-10 11:23:56 -05:00
Benjamin Walsh d340d4cb3f device: use DEVICE_INIT everwhere
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().

Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh 0303d8cab9 device: rename SYS_DEFINE_DEVICE()
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.

Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Benjamin Walsh bfc27206b2 device: rename DECLARE_DEVICE_INIT_CONFIG()
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.

Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:25:25 -05:00
Ido Yariv bbccd7d30a galileo: pinmux: fix WIFI_DISABLE_N & PCIE_RESET_N
Both WIFI_DISABLE_N & PCIE_RESET_N are output pins which control the
mini-PCIe, so fix the pinmux settings accordingly.

In addition, to avoid resetting the mini-PCIe card, keep PCIE_RESET_N
high.

Change-Id: I7478a7ee5771d8840c53ec4e9cc15551d31653e3
Signed-off-by: Ido Yariv <idox.yariv@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Ido Yariv <ido@wizery.com>
2016-02-05 20:25:12 -05:00
Anas Nashif 10bb38c186 Use SoC instead of platform.
Change terminology and use SoC instead of platform. An SoC provides
features and default configurations available with an SoC. A board
implements the SoC and adds more features and IP block specific to the
board to extend the SoC functionality such as sensors and debugging
features.

Change-Id: I15e8d78a6d4ecd5cfb3bc25ced9ba77e5ea1122f
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:11 -05:00
Anas Nashif 1cfc5b3f6f Move defconfig files to the board directory
This commit also renames boards and makes naming consistent between
board name and defconfig files.

quark_d2000_reference -> quark_d2000_crb
quark_se_test_sss -> quark_se_sss_ctb
quark_se_test -> quark_se_ctb

Change-Id: Ibe6a5102edb987fe1d6ce32c8c392a87d45d6951
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:11 -05:00
Anas Nashif 9ee7c3a585 galileo: move galileo related files to board
The Galileo pinmux configuration and reboot code belong into
the board and not the SoC.

Change-Id: If862178569438a8901902088bd085275416c25ef
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:11 -05:00
Anas Nashif 013e6167a8 build: switch to board based configurations
Define boards based on platforms/SoCs and define them under boards/.
Also unify the naming of all platform, SoC and board files and use
platform.h for platforms and board.h for boards.

Change-Id: Icfeb96479ab5800aca98c80a79bdc3cecd645314
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:11 -05:00
Anas Nashif aae72278dd galileo: Split board configuration from SoC
Change-Id: I1cdbe563521d004e4677b3bacb5407a07edba655
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:11 -05:00
Anas Nashif b04958a006 platforms: introduce Quark X1000 SoC
The Galileo board is based on the X1000 SoC, so move galileo to
boards and create this SoC instead, inheriting all SoC related code
and configuration items.

Change-Id: I9b39f1b44644775ee48acae284b82bae7876fffb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:10 -05:00
Anas Nashif fdb1daf786 kconfig: add board configurations
First step for adding the new board layer. Create configurations for the
various boards we support on x86 under boards with the new Kconfig variables
defining them.

The board selection is optional, that means you will be able to run

 make menuconfig

and create your own .config and select any SoC.

Change-Id: If08e88e9675d13f0f0501ef6750b9424b15f5dc8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:25:10 -05:00