Commit Graph

14 Commits

Author SHA1 Message Date
Ulf Magnusson 2b61031c8f kconfig: Remove symbol types from Kconfig.defconfig files
Same deal as in commit 7fdb525754 ("kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), but I hacked Kconfiglib to also
find cases where the type is given separately as e.g.

    config FOO
            int
            default 3

Motivation (from a note in
https://docs.zephyrproject.org/latest/guides/kconfig/index.html):

    For a symbol defined in multiple locations (e.g., in a
    Kconfig.defconfig file in Zephyr), it is best to only give the
    symbol type for the "base" definition of the symbol, and to use
    'default' (instead of 'def_<type>' value) for the remaining
    definitions. That way, if the base definition of the symbol is
    removed, the symbol ends up without a type, which generates a
    warning that points to the other definitions. That makes the extra
    definitions easier to discover and remove.

It's also nice if 'def_bool' and the like turn into a semi-reliable flag
that the symbol is only defined in Kconfig.defconfig files. That might
be a sign that things could be cleaned up.

Will do a separate pass later to remove some symbols only defined in
Kconfig.defconfig files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-10-24 12:40:22 -05:00
Jan Van Winkel 70fb574a6e linker: cxx: xtensa: Added .gcc_except_table.*
Make sure that all sub-sections of .gcc_except_table are mapped in
rodata else C++ builds with exceptions enabled will generate warnings
due to orphan sections.

Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
2019-09-19 09:26:42 -05:00
Andrew Boie 6fd6b7e50a xtensa: remove legacy arch implementation
We re-wrote the xtensa arch code, but never got around
to purging the old implementation.

Removed those boards which hadn't been moved to the new
arch code. These were all xt-sim simulator targets and not
real hardware.

Fixes: #18138

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-09-12 01:26:34 -04:00
Piotr Zięcik f2d84f08ff arch: xtensa: Get CPU clock frequency from DTS
The SoC initialization code used system clock frequency
as a CPU clock frequency. This commit corrects that by
obtaining the needed value from DTS.

Signed-off-by: Piotr Zięcik <piotr.ziecik@nordicsemi.no>
2019-07-24 15:10:02 +02:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Ulf Magnusson 53376394b7 kconfig: Remove blank lines at the beginning/end of files
Maybe this is some "just in case" thing that got copied around. There's
no need to have a blank line at the beginning or end of Kconfig files.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-13 07:29:42 -05:00
Anas Nashif 5cf49956e7 logging: add backend for xtensa simulator
Add backend for the xtensa simulator.

Fixes #10164

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-03-04 10:35:07 -05:00
Savinay Dharmappa 40e0f18e21 dts: qemu_xtensa/xt-sim: Enable device tree support
patch enables dts support for boards qemu_xtensa and xt-sim

Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
2019-02-01 07:49:28 -06:00
Ulf Magnusson 4638652214 Kconfig: Use 'default' instead of 'def_bool' in Kconfig.defconfig files
This can help find unused symbols. Those end up without a type if
'default' is used instead of 'def_bool', which generates a warning.

Search for "Kconfig.defconfig" in
https://docs.zephyrproject.org/latest/application/kconfig-tips.html for
a longer explanation.

Keep the 'def_bool' for the following symbols, which seem to be
deliberately defined only in Kconfig.defconfig files:

 - ALTERA_AVALON_I2C
 - ALTERA_AVALON_MSGDMA
 - ALTERA_AVALON_PIO
 - ALTERA_AVALON_QSPI
 - ALTERA_AVALON_SYSID
 - CLOCK_CONTROL_IMX_CCM
 - CPU_EM4_DMIPS
 - CPU_EM4_FPUDA
 - CPU_EM4_FPUS
 - FP_FPU_DA
 - I2C_GECKO

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2018-11-13 16:04:01 -05:00
Andrew Boie 506f15c381 interrupts: simplify position of sw ISR table
We now place the linker directives for the SW ISR table
in the common linker scripts, instead of repeating it
everywhere.

The table will be placed in RAM if dynamic interrupts are
enabled.

A dedicated section is used, as this data must not move
in between build phases.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2018-11-10 11:01:22 -05:00
Daniel Leung 6600c64331 linker: warn about orphan sections
(Previous patch set was reverted due to issue with priv_stack.
 Resubmitting after fixing the faults caused by priv_stack.noinit
 not at the end of RAM.)

This adds a linker flag and necessary changes to linker scripts
so that linker will warn about orphan sections.

Relates to #5534.

Fixes #10473, #10474, #10515.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-19 16:11:34 -04:00
Anas Nashif 0d4b5daeaa Revert "linker: warn about orphan sections"
This reverts commit 8ce758a8ff.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-10-14 12:14:04 -04:00
Daniel Leung 8ce758a8ff linker: warn about orphan sections
This adds a linker flag and necessary changes to linker scripts
so that linker will warn about orphan sections.

Relates to #5534.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-09 08:23:41 -04:00
Anas Nashif cea0b3a9c2 xtensa: move soc to top-level dir soc/
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00