Mostly includes minor maintainability updates:
- ci: Add building the HW models as a github workflow
- irq_sources: Remove unneeded irq_sources.h
- irq_ctrl: Define IRQ names inside HW models
- HW_models: NRF_RADIO: Set missing NRF_RADIO states
- HW_models: NRF_RADIO: Disable radio state while RXDISABLE
- HW_Models: NRF_PPI: Enable ppi task and event for TIMER0 CH3
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Pull in a fix in the nrfx_qspi driver for a problem with incorrect
status returned by `nrfx_qspi_mem_busy_check()`.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
For targets without thread local storage, we need to use the builtin
per-thread errno support provided by Zephyr as the multi-thread errno
support provided in picolibc relies on TLS.
Signed-off-by: Keith Packard <keithp@keithp.com>
This code has gone unmaintained and bugs continue to be reported
against it. We do not have the resources as a project to maintain this
in "odd fixes" mode, and nobody has stepped up to maintain it [1], so
sadly this must be removed for now.
If anyone would like to see civetweb supported in upstream Zephyr
again, they are welcome to add it back, as long as they promise to
maintain it going forward.
Many thanks to everyone who has contributed to civetweb support in
Zephyr while it was here. So long and thanks for all the fish.
Fixes: #45807Fixes: #43910Fixes: #34226Fixes: #46743
[1] https://lists.zephyrproject.org/g/devel/message/8466
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Picolibc is a fork of newlib designed and tested on embedded systems. It
offers a smaller memory footprint (both ROM and RAM), and native TLS
support, which uses the Zephyr TLS support.
By default, the full printf version is included in the executable, which
includes exact floating point and long long input and output. A
configuration option has been added to switch to the integer-only
version (which also omits long long support).
Here are some size comparisons using qemu-cortex-m3 and this application
(parameters passed to printf to avoid GCC optimizing it into puts):
void main(void)
{
printf("Hello World! %s %d\n", CONFIG_BOARD, 12);
}
FLASH SRAM
minimal 8696 3952
picolibc int 7600 3960
picolibc float 12304 3960
newlib-nano int 11696 4128
newlib-nano float 30516 4496
newlib 34800 6112
---
v2:
Include picolibc-tls.ld
v3:
Document usage in guides/c_library.rst and
getting_started/toolchain_other_x_compilers.rst
v4:
Lost the lib/libc/picolibc directory somehow!
v5:
Add PICOLIBC_ALIGNED_HEAP_SIZE configuration option.
Delete PICOLIBC_SEMIHOST option support code
v6:
Don't allocate static RAM for TLS values; TLS
values only need to be allocated for each thread.
v7:
Use arm coprocessor for TLS pointer storage where supported for
compatibility with the -mtp=cp15 compiler option (or when the
target cpu type selects this option)
Add a bunch of tests
Round TLS segment up to stack alignment so that overall stack
remains correctly aligned
Add aarch64 support
Rebase to upstream head
v8:
Share NEWLIB, NEWLIB_NANO and PICOLIBC library configuration
variables in a single LIBC_PARTITIONS variable instead of
having separate PICOLIBC_PART and NEWLIB_PART variables.
v9:
Update docs to reference pending sdk-ng support for picolibc
v10:
Support memory protection by creating a partition for
picolibc shared data and any pre-defined picolibc heap.
v11:
Fix formatting in arch/arm/core/aarch64/switch.S
v12:
Remove TLS support from this patch now that TLS is upstream
Require THREAD_LOCAL_STORAGE when using PICOLIBC for architectures
that support it.
v13:
Merge errno changes as they're only needed for picolibc.
Adapt cmake changes suggested by Torsten Tejlmand Rasmussen
v14:
Update to picolibc 1.7 and newer (new stdin/stdout/stderr ABI)
v15:
Respond to comments from dcpleung:
* switch kernel/errno to use CONFIG_LIBC_ERRNO instead of
CONFIG_PICOLIBC
* Add comment to test/lib/sprintf as to why the %n test
was disabled for picolibc.
v16:
Switch picolibc to a module built with Zephyr. This eliminates
toolchain dependencies and allows compiler settings for Zephyr
to also be applied to picolibc.
v17:
Provide Zephyr-specific 'abort' implementation.
Support systems with MMU
v18:
Allow use of toolchain picolibc version.
v19:
Use zephyr/ for zephyr headers
v20:
Add locking
Use explicit commit for picolibc module
v21:
Create PICOLIBC_SUPPORTED config param. Set on arc, arm, arm64,
mips and riscv architectures.
Signed-off-by: Keith Packard <keithp@keithp.com>
Updates hal_espressif's revision to include:
- latest pinctrl definitions.
- support for building ESP32C3 USB driver
Signed-off-by: Glauber Maroto Ferreira <glauber.ferreira@espressif.com>
This PR introduces a fix for DRX window being triggered to early during
CSL. Fixes were also introduced in the nrf 802154 radio
driver, so removed the unneeded DRX_ADJUST constant.
Signed-off-by: Artur Hadasz <artur.hadasz@nordicsemi.no>
bring fix from mcu-tools/mcuboot:
- espressif:esp32: Move app entry point call back to
iram_loader_seg region
fixes#45349fixes#46093
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
bring fixes from mcu-tools/mcuboot
- disables CONFIG_USB_DEVICE_REMOTE_WAKEUP as it is unsupported by MCUboot
- fix CONFIG_MCUBOOT_INDICATION_LED usage
- bootutil: zephyr: Fix not including tinycrypt path when needed
- bootutil: zephyr: Fix not linking with mbedtls when needed
- boot: zephyr: add Kconfig for arm cortex-m that implements a cache
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
When newlibc is enabled, memcpy_chk fails due to
overflow when testing destination address length.
This updates the source and destination range defintion
so that it works as expected.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
Updates zscilib to support recent changes in zephyr
3.x, such as the `zephyr/` prefix on include files.
Signed-off-by: Kevin Townsend <kevin.townsend@linaro.org>
Update the espressif HAL to allow building without having ZEPHYR_BASE set
in the environment.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The following modules contain code that include Zephyr headers:
- fatfs
- littlefs
- hal_espressif
They have all been update with the <zephyr/...> include prefix.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Espressif boards cannot have ble and wifi
CI build tests due to binary blobs policies.
This removes refered tests.
west.yml: update hal repository to get updates
that allows building using Zephyr's SDK.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
The following HALs contain code that makes use of Zephyr headers, so
they have been updated with the <zephyr/...> prefix:
- Altera
- NXP
- STM32
- TI
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
Building documentation in .rst format causes warnings due to
missing nrfx_atomic which is not used in hal_nordic.
Signed-off-by: Nikodem Kastelik <nikodem.kastelik@nordicsemi.no>
Update the CMSIS fork to import a function required for correct
operation of the CMSIS-NN tests.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v2.01.
Requires https://github.com/zephyrproject-rtos/hal_st/pull/9
(merged as 52a522ca4a8a9ec1e9bb5bb514e1ab6f102863fe)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This modification is required to enable flash encryption.
Using hal implementation of spi_flash calls maintains
compability amongs different socs while offering
latest esp-idf enhancements.
Signed-off-by: Sylvio Alves <sylvio.alves@espressif.com>
This update introduces several bug fixes and improvements:
- correctly handle kscan inputs outside of range
- don't be too verbose with spurious kscan events
- fix the whene param in lvgl's filesystem seek callback
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@huawei.com>
Adding configurations for enabling this sample project on cavs
platforms. This patch also contains a fix to mipi_syst library
which resolves the memory alignment issue across different
architectures.
Fixes#43344
Signed-off-by: Aastha Grover <aastha.grover@intel.com>
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Update to commit <2efc3ea41c0074c6dab5f376fafaa26f52c25c75> ("topology2:
dmic-generic: add support for 4ch capture" from upstream SOF.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
update pin control implementation to use offsets for pin registers
instead of pin/port combination, to permit additional flexibility for
lpc devices with non contiguous register layouts. Update LPC55s69 pin
control names to align with newly generated pin control header.
This change also requires an update to the NXP HAL to use the new pin
control headers with offsets.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Add initial build rules for CHRE. This change includes a Kconfig and
CMakeLists.txt to begin compiling code from the CHRE module.
Additional files are included to bridge the APIs from CHRE's to
Zephyr's. These can be found in modules/chre/include and
modules/chre/src.
Additionally, add a sample to make sure that the module builds. It can
be built via:
```
$ west build -b native_posix -p=always samples/application_development/chre
```
Signed-off-by: Yuval Peress <peress@google.com>
Platform specific functions necessary to enable this feature were
implemented (z_xtensa_ptr_executable() and
z_xtensa_stack_ptr_is_sane() for Intel ADSP platforms.
Current implementation just ensures stack pointer and program counter
are within relevant areas defined in the linker scripts, without going
too fine grained.
Also, `.iram1` section, used by the backtrace code, also added to
Intel ADSP linker script.
Finally, update west manifest to use up-to-date SOF, which contains a
patch to fix build issues related to the linker changes.
Signed-off-by: Ederson de Souza <ederson.desouza@intel.com>
update hal_microchip revision, which includes mpfs_hal
for Microchip's PolarFire-SoC Icicle Kit.
Signed-off-by: Conor Paxton <conor.paxton@microchip.com>
Lukasz Maciejonczyk