The board enabled power switches at init time, hardcoding switch
information in a board C file. This patch makes use of the regulator
infrastructure to describe such power switches in DT, making the board
specific C code obsolete. CONFIG_REGULATOR is only enabled if
CONFIG_SENSOR=y, as switches power sensors.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
The board enabled power switches at init time, hardcoding switch
information in a board C file. This patch makes use of the regulator
infrastructure to describe such power switches in DT, making the board
specific C code obsolete. CONFIG_REGULATOR is only enabled if
CONFIG_SENSOR=y, as switches power sensors.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
A number of boards utilize device_get_binding(DT_LABEL(...)) to
get a gpio for some purpose. Switch over to using DEVICE_DT_GET
and device_is_ready() instead. This is part of the ongoing
cleanup towards phasing out usage of the "label" property in DTS.
Signed-off-by: Kumar Gala <galak@kernel.org>
The Nucleo H7A3ZI-Q board has a micro USB connector connected to the USB
OTG HS controller. Enable it and update the documentation.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add IMG_BLOCK_BUF_SZE config into tlsr9518adk80d_defconfig due to
limitations for buffer image writter. The buffer shall be less (multiple
of access alignment) or equal to flash page. tlsr9518adk80d boards use
external P25Q16 IC as flesh memory. Flash page size of the IC is 256
bytes. So that, it is maximum image writer buffer size for such kind of
boards.
Signed-off-by: Alexandr Kolosov <rikorsev@gmail.com>
- Remove flash_mspi node that contains old one flash partition
- Add new partition in flash node
- Add the partition into choosen
- Add led2, led3 into aliases
Signed-off-by: Alex Kolosov <rikorsev@gmail.com>
The interrupt names are now defined in the HW models.
As a result, all source files in the nrf52_bsim folder are now
free of nrf52832 specific references. Therefore these can in
theory be used for other models as well.
Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
Some STM32 based boards where missing the alternate node label zephyr_udc0,
leading to build issues when compiling usb samples.
Fixes#46626
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit adds a user button to the board DTS.
The button is not connected to nRESET as suggested
by the board schematics, but rather connected to
P0.21. The source code found in the Arduino IDE
connects an interrupt to this GPIO and calls
NVIC_System_Reset from there to cause the reset.
The button was therefore added as a regular button
to cover the most general case.
This has been verified on an Arduino Nicla Sense ME.
Signed-off-by: Benjamin Björnsson <benjamin.bjornsson@gmail.com>
Picolibc is a fork of newlib designed and tested on embedded systems. It
offers a smaller memory footprint (both ROM and RAM), and native TLS
support, which uses the Zephyr TLS support.
By default, the full printf version is included in the executable, which
includes exact floating point and long long input and output. A
configuration option has been added to switch to the integer-only
version (which also omits long long support).
Here are some size comparisons using qemu-cortex-m3 and this application
(parameters passed to printf to avoid GCC optimizing it into puts):
void main(void)
{
printf("Hello World! %s %d\n", CONFIG_BOARD, 12);
}
FLASH SRAM
minimal 8696 3952
picolibc int 7600 3960
picolibc float 12304 3960
newlib-nano int 11696 4128
newlib-nano float 30516 4496
newlib 34800 6112
---
v2:
Include picolibc-tls.ld
v3:
Document usage in guides/c_library.rst and
getting_started/toolchain_other_x_compilers.rst
v4:
Lost the lib/libc/picolibc directory somehow!
v5:
Add PICOLIBC_ALIGNED_HEAP_SIZE configuration option.
Delete PICOLIBC_SEMIHOST option support code
v6:
Don't allocate static RAM for TLS values; TLS
values only need to be allocated for each thread.
v7:
Use arm coprocessor for TLS pointer storage where supported for
compatibility with the -mtp=cp15 compiler option (or when the
target cpu type selects this option)
Add a bunch of tests
Round TLS segment up to stack alignment so that overall stack
remains correctly aligned
Add aarch64 support
Rebase to upstream head
v8:
Share NEWLIB, NEWLIB_NANO and PICOLIBC library configuration
variables in a single LIBC_PARTITIONS variable instead of
having separate PICOLIBC_PART and NEWLIB_PART variables.
v9:
Update docs to reference pending sdk-ng support for picolibc
v10:
Support memory protection by creating a partition for
picolibc shared data and any pre-defined picolibc heap.
v11:
Fix formatting in arch/arm/core/aarch64/switch.S
v12:
Remove TLS support from this patch now that TLS is upstream
Require THREAD_LOCAL_STORAGE when using PICOLIBC for architectures
that support it.
v13:
Merge errno changes as they're only needed for picolibc.
Adapt cmake changes suggested by Torsten Tejlmand Rasmussen
v14:
Update to picolibc 1.7 and newer (new stdin/stdout/stderr ABI)
v15:
Respond to comments from dcpleung:
* switch kernel/errno to use CONFIG_LIBC_ERRNO instead of
CONFIG_PICOLIBC
* Add comment to test/lib/sprintf as to why the %n test
was disabled for picolibc.
v16:
Switch picolibc to a module built with Zephyr. This eliminates
toolchain dependencies and allows compiler settings for Zephyr
to also be applied to picolibc.
v17:
Provide Zephyr-specific 'abort' implementation.
Support systems with MMU
v18:
Allow use of toolchain picolibc version.
v19:
Use zephyr/ for zephyr headers
v20:
Add locking
Use explicit commit for picolibc module
v21:
Create PICOLIBC_SUPPORTED config param. Set on arc, arm, arm64,
mips and riscv architectures.
Signed-off-by: Keith Packard <keithp@keithp.com>
Remove explicit BT_HCI_VS enable, this will be enabled when
the used Controller selects BT_HAS_HCI_VS.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Disable BT_ECC support in network core to reduce RAM usage.
ECC implementation can instead be supported in the Host
running in the application core.
This is also to keep hci_uart (nRF52 Series) and hci_rpmsg
(nRF53 Series) have the same support features. ECC is not
enabled in hci_uart sample.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Choose can2 as the zephyr,canbus instance and add necessary settings
for testing of the STM32 dual CAN driver implementation.
Signed-off-by: Martin Jäger <martin@libre.solar>
Enable testcases under tests/drivers/gpio/gpio_basic_api
To run in twister, "-X gpio_loopback" parameter is needed.
Signed-off-by: Yinfang Wang <yinfang.wang@intel.com>
Do not check for exact SoC to pass '--cores=${CONFIG_MP_NUM_CPUS}'
options to runners an pass it unconditionally instead.
That preventis from issues when adding new SoC/board.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Evgeniy Paltsev <PaltsevEvgeniy@gmail.com>
The armv8 timer, arm gic, and arm gic-v3-its don't use or need the
devicetree label property. Update the dts bindings to not require it and
remove setting of the label property in dts files.
Signed-off-by: Kumar Gala <galak@kernel.org>
This commit fixes link pointing to HiFive1's page on the vendor site and
adds its image to the docs.
Signed-off-by: Filip Kokosinski <fkokosinski@antmicro.com>
The STM32H7A3 SoC supports a CPU clock up to 280 MHz for VOS0. The AHB
bus is also limited to 280 MHz, while the APB buses are limited to
140 MHz.
This patch updates the PLL configuration to change the CPU frequency to
280 MHz, while tkaing into account the above constraints.
The Q output divisor is adjusted to keep a frequency in the same range,
in practice increased from 48 to 56 MHz. It is currently only used by
the SPI so that should not be an issue, especially given the SPI
interface can use much higher frequencies.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
The ns16550 flags reg-shift property as optional. In case it is not
supplied, the ns16550 driver relies on a value defined in <soc.h>, or,
by default it takes 4 (shift by 2).
This patch adds the property to all ns16550 nodes, with the following
values:
- 2 if SoC did not have any custom value defined by
UART_REG_ADDR_INTERVAL (corresponds to 1 << 2 = 4)
- If SoC defined DEFAULT_REG_INTERVAL (snps_arc_iot/it8xxx2), use such
value (4=2, 2=1, 1=0).
These changes will allow simplifying the ns16550 driver.
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
This reverts commit 209e4ee1a1
which had broken the "spi_gen utility find" functionality.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
The 32.768 kHz crystal shown on the Holyiot YJ-16019 schematics is not
mounted. Enable the LRRC RC oscillator instead.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The MT25QL256 part is connected via the RPI connector using Fabric IOs
on the Polarfire SOC Icicle Kit.
Signed-off-by: Naga Sureshkumar Relli <nagasuresh.relli@microchip.com>
- The MX25UM51345G flash is connected to FLEXSPI PortA for
mimxrt595_evk.
- Updated flexspi_mx25um51345g driver to support DTR OPI mode.
- Tested with tests/drivers/flash.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
Add watchdog support to the mimxrt595 platform.
The mimxrt595 platform is excluded from the watchdog
test case because the test case uses variables in the
noinit section that need to be retained through a reset
but the rt595 does not retain this memory through a
reset.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
Enable access to the HS_SPI pins(JP26) on the mimxrt595_evk board.
Using DMA mode, tested with spi_loopback testcase.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
Enable I2C access to FXOS7000 sensor on the mixrt595_evk board
Tested using samples/sensor/fxos8700 for mimxrt595_evk_cm33.
Signed-off-by: Chay Guo <changyi.guo@nxp.com>
All the gpio drivers are based on devicetree and thus we always set
HAS_DTS_GPIO, thus we don't need this Kconfig option anymore. Remove
uses as its safe to assume DTS is supported for GPIO.
Signed-off-by: Kumar Gala <galak@kernel.org>
We should avoid use of the label property in devicetrees. The
'zephyr,sdmmc-disk' compatible node has a 'label' property set
but there isn't any code utilizing this so removing the property
from any devicetrees that have it set (as well as example in docs).
Signed-off-by: Kumar Gala <galak@kernel.org>
Use "seeed" instead of "seeedstudio", as the former is registered in
`dts/bindings/vendor-prefixes.txt`.
Signed-off-by: Marcin Niestroj <m.niestroj@emb.dev>
Gerard Marull-Paretas