Document change to mipi-dbi device binding, and provide users with
example of how to transition to the new mipi-mode property.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Use a string for the mipi-mode property over an integer value, as this
significantly improves the readability of the MIPI DBI device binding.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The python subprocess call had a stdout=subprocess.PIPE parameter that
redirects standard output to a pipe, and a stderr=subprocess.STDOUT
parameter that redirected stderr to the pipe. This mixed JSON and
non-JSON output together, and issued an exception. Fixing with
stderr=subprocess.DEVNULL to ignore standard error and only keep the
JSON output.
Signed-off-by: Josuah Demangeon <me@josuah.net>
Reset pulse count can be up to 512 before we would be unable to support
it using the peripheral. Use a uint32_t for the count, so that even long
reset pulses will still be calculated correctly. Add code to warn about
reset pulse requests that are too long.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The NXP LCDIC peripheral contains two internal timers, with configurable
periods. These times are used to determine delays within the peripheral,
such as the reset and tearing enable signal delays. Allow these periods
to be set within the devicetree for the peripheral.
Raise the period where required for display drivers that need a value
other than the reset setting
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
Extend tca954x (tca9546a, tca9548a) driver to support tca9544a i2c MUX.
(different bitmask and flag for enable bit in register)
Signed-off-by: Florian Weber <Florian.Weber@live.de>
Add isr_ok property to the interrupt configure API.
For level-triggered interrupt the interrupt may have to be disabled
until a thread context can process it and clear the interrupt trigger.
The function is documented as returning an error if it would block.
Drivers in zephyr already do this, so if this is not ISR safe function
then they need to be fixed.
Signed-off-by: Joakim Andersson <joerchan@gmail.com>
- Add possibility to disable functions that use heap. This is to
reduce code size and prevent accidental use of heap.
- Add possibility to compile xxhash library, "Extremely Fast Hash
algorithm" in. It might be sometimes needed as a standalone,
but especially lz4frame requires it.
- Add possibility to compile also hc and lz4frame modules. The
config options include possibility to configure will heap or
stack be used. Defaults are set according to lz4's current
defaults.
Signed-off-by: Miika Karanki <miika.karanki@vaisala.com>
Add EAP-TLS, EAP-PEAP-MSCHAPv2, EAP-PEAP-GTC, EAP-TTLS-MSCHAPv2,
EAP-PEAP-TLS, EAP-TLS-SHA256 enterprise wpa2 and wpa3 suiteb
support for sap.
Signed-off-by: Rex Chen <rex.chen_1@nxp.com>
Add note about compatible change for NXP PORT IP. Also, update
references to the DT compatible within board docs.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
NXP PORT IP instantiations often have different features absent, IE
input buffer, open drain, or slew rate support. Check if the relevant
PCR register bitmasks are defined in the common pin control file, and
define the bitmasks to 0x0 (no effect) if they are not. This allows us
to further consolidate the pinctrl_soc.h headers for SOCs using the PORT
IP.
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
The NXP PORT pinmuxing peripheral is reused across the MCX, S32, and
Kinetis lines. Rename the compatible from the family-specific
nxp,kinetis-pinctrl to a more generic nxp,port-pinctrl to reflect the
actual name for the IP block used within reference manuals.
Update the NXP HAL revision to include a change to use the new Kconfig
name for the PORT pinctrl driver
Update the MAINTAINERS.yml path, as there are no longer any NXP drivers
matching the string "drivers/*/*kinetis*
Signed-off-by: Daniel DeGrasse <daniel.degrasse@nxp.com>
* Replace copies of fixed-partitions nodes in related boards by
referencing the apropriate partition table from the available list.
* For better reference the `partitions_*.dtsi` file has boot offset,
purpose and the flash size encoded in the file name. Default flash size
is considered to be 4MB.
* Added the flash size node for the boards which are not based on the
module.
* Removed flash size registry from the esp32.*common.dtsi
Signed-off-by: Marek Matej <marek.matej@espressif.com>
flash_copy() is performed on a page.size span but following flash_read()
verification step is performed on EXPECTED_SIZE length (512).
This doesn't work on devices where page.size is lower than EXPECTED_SIZE,
such as STM32L1 where page size is 256.
To fix this, perform verification on the smalest value between page.size
and EXPECTED_SIZE.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
STM32F4 series flash layout is as follows:
{.pages_count = 4, .pages_size = KB(16)},
{.pages_count = 1, .pages_size = KB(64)},
{.pages_count = 7, .pages_size = KB(128)}
Since NVS subsys requires 2 sectors of max 32K in total, provide a
flash partition which respects this constraint using 2 of the 16K sectors
in the beginning of the layout.
Provide a compatible flash partition usable with mcuboot, but keep the
storage partition commented as its usage is not compatible with use w/o
mcuboot enabled (in this case main image starts as offset 0 which conflicts
with storage partition).
Note that it isn't possible either to get main image starting directly
in the 128K sectors w/o bootloader as boot flash address can't be
configured.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
NVS susbsystem requires a slot covering 2 sectors of flash, which
should be at minimum 8K on L1 series which provides 4K sectors.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
NVS susbsystem requires a slot covering 2 sectors of flash, which
should be at minimum 4K on G0 series which provised 2K sectors.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
STM32F2 series flash layout is as follows:
{.pages_count = 4, .pages_size = KB(16)},
{.pages_count = 1, .pages_size = KB(64)},
{.pages_count = 7, .pages_size = KB(128)}
Since NVS subsys requires 2 sectors of max 32K in total, provide a
flash partition which respects this constraint using 2 of the 16K sectors
in the beginning of the layout.
Provide a compatible flash partition usable with mcuboot, but keep the
storage partition commented as its usage is not compatible with use w/o
mcuboot enabled (in this case main image starts as offset 0 which conflicts
with storage partition).
Note that it isn't possible either to get main image starting directly
in the 128K sectors w/o bootloader as boot flash address can't be
configured.
Signed-off-by: Erwan Gouriou <erwan.gouriou@st.com>
Updated ADXL367 driver with RTIO stream functionality.
RTIO stream is using both FIFO threshold and FIFO full triggers.
Together with RTIO stream, RTIO async read is also implemented.
Supported FIFO_CHANNEL configurations:
- XYZ
- X
- Y
- Z
- XYZT
- XT
- YT
- ZT
Configurations with external ADC are currently not supported.
Signed-off-by: Vladislav Pejic <vladislav.pejic@orioninc.com>
The required ISO Tx buffers have to match the Read Buffer
Size values, otherwise the difference in the value cause a
similar amount of buffers to be stalled in the IPC driver.
Use reduced HEAP size to make room for increase in RAM
usage.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix some test simulation length be greater than wait time.
These tests completed within 12 seconds, 15 second wait
time is a good value with included margin and a 20 second
simulation time.
These tests failed on this PR CI.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Add implementation for Extended Advertising Auxiliary PDUs
to use ticks slot window feature.
This will allow the periodic scheduling of AUX_ADV_IND PDUs
to drift upto 10 ms advertising delay minus the ticks_slot
time reservation of the AUX_ADV_IND PDU when overlapping
with other states/roles that cannot be moved around, to
avoid skipping them.
Having an active Extended Advertising simultaneously with
an ISO Synchronized Receiver or Connected ISO connection
will now have less ISO SDU loss when using 10 ms ISO
intervals.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Introduce ticker reschedule with drift so that role like
AUX_ADV_IND can start after overlapping states and roles
using time reservations.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix to reschedule before overlap and be collision resolved
in the next periodic interval for tickers using slot window
yield.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Exclude stm32 platforms with accel0 or magn0
for running the samples/sensor for trigger
as their sensor driver does not have trigger set.
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Align the total SRAM size for STM32L47x/L48x/L49x/L4Ax
boards. Those MCUs with up to 320 Kbytes SRAM:
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Split and fix the total SRAM size for STM32L4Px/L4Qx/L4Rx/L4Sx
device. Those MCUs with up to 640 Kbytes SRAM:
This is 640KB for the STM32L4Rxxx and STM32L4Sxxx devices :
• 192 Kbytes SRAM1 + 64 Kbytes SRAM2 + 384 Kbytes SRAM3
This is 320KB for the STM32L4P5xx and STM32L4Q5xx devices :
• 128 Kbytes SRAM1 + 64 Kbytes SRAM2 + 128 Kbytes SRAM3
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Align the total SRAM size for STM32L47x/L48x/L49x/L4Ax
boards. Those MCUs with up to 320 Kbytes SRAM:
• 96 Kbytes SRAM1 and 32 Kbyte SRAM2 on STM32L47x/L48x.
• 256 Kbyte SRAM1 and 64 Kbyte SRAM2 on STM32L49x/L4Ax
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Split and fix the total SRAM size for STM32L47x/L48x/L49x/L4Ax
device. Those MCUs with up to 320 Kbytes SRAM:
• 96 Kbytes SRAM1 and 32 Kbyte SRAM2 on STM32L47x/L48x.
• 256 Kbyte SRAM1 and 64 Kbyte SRAM2 on STM32L49x/L4Ax
The sram0 node at address 0x20000000 and sram1 at address 0x10000000
Signed-off-by: Francois Ramu <francois.ramu@st.com>
Add support for IP_LOCAL_PORT_RANGE socket option. The option
supports both IPv4 and IPv6 sockets although the type is IPPROTO_IP.
The option can be used to enforce the ephemeral port number selection
to be in certain range.
Signed-off-by: Jukka Rissanen <jukka.rissanen@nordicsemi.no>
All linter issues in scripts/west_commands/runners are fixed and can be
removed from the exclusion list.
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
Daniel DeGrasse