The stub is supposed to be there to bring up a CPU that needs to be
brought up because the platform requires so, but it needs to be as
practically quiet in terms of printing to the serial port as possible.
Thus, disable printing the boot banner by default.
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Some users might want to inherit their already existing Windows
environment variables into the MSYS2 system. This note explains how to
achieve this.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
When node has 'bus' as 'parent' attribute, change base label to
include parent address in label prefix.
Besides, generates a "_BUS_NAME" define which equals parent label.
Signed-Off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provide dts yaml bindings for 4 sensors supported by disco_l475_iot1
board:
-hts221, lis3mdl, lps22hb and lsm6dsl
Devices are denoted as i2c-devices and, as such, inherits from
i2c-device.yaml
Signed-Off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provide generic yaml description for i2c-devices such as sensors
New yaml binding category 'parent/child' is added.
It aims at binding two types of related node such as bus master and
bus slave.
In case of i2c-device object, parent property is 'bus' with value 'i2c'.
In the mean time, i2c node gets child property bus. Master and slave bus
values should match.
As such, 'i2c' node is bus master and 'i2c-devices' nodes are bus slaves
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add tests of the ability to read or write the stack of another thread.
Use semaphores for explicit synchronization of the start and end of the
other thread to ensure that the attempted stack access occurs while the
thread is alive. This ensures that the MMU/MPU has been configured at
least once to allow userspace access to the stack, and that any
removal of access upon thread termination has not yet occurred. This
therefore should exercise changing the MMU/MPU configuration to remove
access to the other thread's stack when switching back to our
thread.
Tested on qemu_x86 (pass) and on frdm_k64f (with and without the ARM
userspace patches; with them, the tests pass; without, they fail as
expected). Also, as with most of the other tests, if you replace
ztest_user_unit_test() with ztest_unit_test(), then the tests fail as
expected.
Signed-off-by: Stephen Smalley <sds@tycho.nsa.gov>
The linker was always picking a weak handler over the actual one.
The linker always searches for the first definition of any function
weak or otherwise. When it finds this function it just links and
skips traversing through the full list.
In the context of userspace, we create the _handlers_ for each system
call in the respective file. And these _handlers_ would get linked to
a table defined in syscalls_dispatch.c. If for instance that this
handler is not defined then we link to a default error handler.
In the build procedure we create a library file from the kernel folder.
When creating this library file, we need to make sure that the file
syscalls_dispatch.c is the last to get linked(i.e userspace.c).
Because the table inside syscalls_dispatch.c would need all the
correct _handler_ definitions. If this is not handled then the system
call layer will not function correctly because of the linker feature.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
To avoid configuration surprises, replace
CONFIG_CLOCK_STM32_PLL_SRC_HSI
with
CONFIG_CLOCK_STM32_PLL_SRC_HSI=y
No impact today, but could depend on tools.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Steve Brown <sbrown@cortland.com>
---
The updates to BlueZ' meshctl have not been submitted.
I am submitting this PR only for review. It could be committed
after the patches for the meshctl commands are applied.
During cmake migration the load image was not correctly set.
This was causing flash failures.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
When running on jenkins and other automation environment, TERM will
not be defined and thus tput errors out.
Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
For a lot of scenarios the isr stack was no longer enough.
Hence increased the stack size.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
As em7d is supported, all configurations of em_starter_kit version 2.3
are supported. Update all the defconfig to version 2.3.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
MPU version 3 is included in em7d of em_starterkit 2.3.
The differences of MPU version 3 and version 2 are:
* different aux reg interface
* The address alignment requirement is 32 bytes
* supports secure mode
* supports SID (option)
* does not support memory region overlap
This commit adds the support MPU version 3 and also make some changes to
MPU version 2 to have an unified interface.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
* em7d of em_starterkit 2.3 supports secure mode. add the support
in kconfig and build system.
* change the default configuration of em_starterkit 2.3 to em7d
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
In ARC's SecureShield, a new secure mode (currently only em) is added.
The secure/normal mode is orthogonal to kernel/user mode. The
differences between secure mode and normal mode are following:
* different irq stack frame. so need to change the definition of
_irq_stack_frame, assembly code.
* new aux regs, e.g, secure status(SEC_STAT), secure vector base
(VECT_BASE_S)
* interrupts and exceptions, secure mode has its own vector base;
interrupt can be configured as secure or normal through the
interrupt priority aux reg.
* secure timers. Two secure timers (secure timer 0 and timer 1) are
added.Here, for simplicity and backwards compatibility original
internal timers (timer 0 and timer1) are used as sys clock of zephyr
* on reset, the processor is in secure mode and secure vector base is
used.
Note: the mix of secure and normal mode is not supported, i.e. it's
assumed that the processor is always in secure mode.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Add FIRQ option and change the _isr_wrapper. Currently, firq is
enabled by default, but in some arc configuration, firq can be
disabled.
Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
This introduces Bluetooth internal API intended to be used for
qualification purposes. Application may register callbacks to get
data that is not exposed by public API.
Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
This chack shall be performed on attribute uuid type, not uuid provided
in Gatt Get Attributes command paramteres.
Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
Those commands will be used for qualification purposes to verify
the functionality of Mesh Health Model.
Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
This event is needed for qualification purposes to verify functionality
of Mesh Network layer.
Signed-off-by: Mariusz Skamra <mariusz.skamra@codecoup.pl>
Some drivers doesn't implement flash API page layout extension
which is causing the application crash once the API was calling.
This patch introduce system termination for this in those drivers
which doesn't implement extension. This will help to discover this
problem early.
It is not done by preprocessor check because it is possible to have
enabled a driver which support and a driver which doesn't support
this API simultaneously.
Now FLASH_PAGE_LAYOUT configuration option is accessible only in case
that at last one driver which implements mentioned API is enabled.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
On stm32f3_disco pins PF0/PF1 are used for OSC_IN/OSC_OUT
signals. Use pins PA9/PA10 for I2C_2 port
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Enable USB OTG support for olimex stm32-e407 and stm32f407g_disc1
boards by adding USB OTG to the pinmux table. Also, fix out of
range endpoint addresses in CDC ACM case for STM32F4 based boards.
Signed-off-by: Sudarsana Nagineni <sudarsana.nagineni@intel.com>
Add the STM32F0 Embedded Flash support in the flash_stm32 driver
interface.
The STM32F0 has a particularity or use the HSI as clock source
for the flash controller interface, so this clock must be
enabled directly in the case HSE or another clock is used by
the system clock.
Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Kumar Gala