Commit Graph

11 Commits

Author SHA1 Message Date
Anas Nashif 4115d68ef9 link: remove unsupported features
Removing unsupported features that we inherited from Linux kbuild

Change-Id: I7cf19f913b0a7ba6195d2cb9c04b426144bdebb9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:41 -05:00
Anas Nashif c0078cfb9b Remove linux features in build process that we do not support
Lots of code that is not being used by Zephyr but makes debugging and find
issues related to zephyr very difficult.

Change-Id: If8f6515d68f64b03cc881a9c3cde48c0451fe3b5
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:41 -05:00
Peter Mitsis 47888a31db Update static IDT generation to use IRQ priority
Updates the 'gen_idt' tool to generate a mapping of IRQ numbers to
interrupt vector IDs, thereby allowing the IRQ priority to be utilized
when statically connecting an interrupt.

Change-Id: I2e54ceb65145682820dfbd8ca1ee6ec68d71ce1a
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:34 -05:00
Peter Mitsis 5705d06874 x86: Properly initialize _interrupt_vectors_allocated[] bitmap
Updates the 'gen_idt' tool to generate a bitmap of (statically) allocated
interrupt vectors that is linked into the final image in a manner similar to
the static IDT. The kernel then uses this bitmap when dynamically connecting
an interrupt vector, thereby preventing the dynamic irq connections
from clobbering the static irq connections.

Change-Id: I0a8f488408dad4912736865179f32f63ff1ca98f
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:24:28 -05:00
Alexandre dAlton 3bef343493 linker: add whole-archive flag to app lib
Change-Id: I167b67bb227718d18bc383c4562cccaa915ed22b
Signed-off-by: Alexandre d'Alton <alexandre.d'alton@intel.com>
Signed-off-by: Alexandre d'Alton <alexandre.dalton@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:24:04 -05:00
Anas Nashif e927a459cd build offsets in-place and not in include/generated
We have been building offsets.o in the include directory, this
is wrong.

Change-Id: I22e785413158117e1cdfa8353bd7f4d022fae0ac
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:33 -05:00
Anas Nashif fde80d7ead cleanup makefiles and remove duplication
Makefile.inc duplicates many of the existing targets in Makefile.
Instead of duplication, pass all none local targets to Makefile
and implement only those needed locally.

Change-Id: I1e923dd398a138543fa676ab67570b630c75d7ea
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:32 -05:00
Anas Nashif a8259afed8 allow linking of external application libraries
This will allow building of external components and linking
them at the end of the build process to the main kernel.

add a Makefile.app to the project directory with the required
targets, for example

Makefile.app:

KBUILD_ZEPHYR_APP := /tmp/libapp.a

/tmp/libapp.a:
	@touch /tmp/libapp.a

Change-Id: If2ba6b3ee59023acc5f85c5701b65c4d096d5059
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:15:21 -05:00
Anas Nashif 9aeb08213f toolchain: add support for iamcu toolchain
See
https://groups.google.com/forum/#!topic/ia32-abi/cn7TM6J_TIg

for more details.

• Support IA32 without FPU.
• Minimum ISA: Pentium ISA without x87 FPU instructions.
• Don't allow mixing i386 object files with Intel MCU object files.
• Support floating point with software emulation:
     a. Long double is the same as double.
     b. Use __float80 for 80-bit double.
• Minimize memory footprint:
     a. Code size
     b. Data size
     c. Stack size

Here is the draft of Intel MCU psABI.   The differences from IA32
 psABI are

1. The minimum instruction set is Intel Pentium ISA minus instructions
for x87 floating point unit.
2. There are no x87 floating point registers.
3. There are no vector registers.
4. Segment registers are optional.
5. Support for TLS relocations are optional.
6. Scalar types larger than 4 bytes are aligned to 4 bytes.
7. There are no vector types.
8. _Decimal32, _Decimal64, and _Decimal128 types are optional.
9. long double type is the same as double.
10. float, double and long double types are passed and returned in
 general purpose registers.
11. _Decimal32 and _Decimal64 types are passed in general purpose
registers.
12. Aggregate types no larger than 8 bytes are passed and returned
in general purpose registers.
13. Stack is 4-byte aligned.
14. The auxiliary vector support is optional.
15. Register %edx has undefined value at process entry.
16. New ELF machine code: EM_IAMCU.
17. New predefined C/C++ pre-processor symbols: __iamcu and __iamcu__

Change-Id: I6a0c45ad22d8f710b6f37a041aaa2fc1bf0b1c39
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:38 -05:00
Anas Nashif 37b50b62ce Use value of CONFIG_IDT_NUM_VECTORS when creating static idt
Restore original behaviour from before moving to kbuild

Change-Id: I299ad25cf39378b2537e0791cce65f077c5d1c08
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:27 -05:00
Anas Nashif 652309470c Rename tinymountain -> zephyr
Remove excessive use of zephyr and use a more generic
terminology where possible.

Change-Id: Ida8916765dbe824f63d7a4cedba60b35d14aee55
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-02-05 20:14:16 -05:00