The ethernet driver generates a lot of spurious interrupts.
These spurious interrupts have two sources:
1) The Mac Management Counter (MMC) module generates a lot of interrupts
(GMI - bit 27 of the status register). Unfortunately the Interrupt
enable register doesn't allow us to enable/disable it (bit 27 is
reserved). Therefore the only way to mask this interrupt is to mask
all the MMC interrupts (register REG_MMC_RX_INTR_MASK,
REG_MMC_TX_INTR_MASK and REG_MMC_RX_IPC_INTR_MASK). By default
these interrupts are not masked.
2) The RX interrupt is not correctly acknowledged. According to the
datasheet, NIS is a sticky bit and must be cleared (by writing 1
to this bit) each time a corresponding bit, which causes NIS to
be set, is cleared.
Change-Id: I2033973849d87cddc328c65d0d4ad36b5a0c934e
Signed-off-by: Sebastien Griffoul <sebastien.griffoul@intel.com>
Adds extern "C" { } blocks to header files so that they can be
safely used by C++ source files.
Change-Id: Ia4db0c36a5dac5d3de351184a297d2af0df64532
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
This patch adds a driver for a Synopsys DesignWare Ethernet MAC. The
driver uses interrupts to handle received frames, but it uses a
spinloop when transmitting to wait for the transmit descriptor to
become available. Transmission is coordinated by a fiber, so this
should not result in the system execution being blocked. Only a
single descriptor is allocated for each of the transmit and receive
directions to save memory and simplify the code. Another
simplification is that none of the offload capabilities of the
Ethernet device are used. The driver currently only supports a single
instance of the Ethernet MAC, which is consistent with the limitation
in the network stack that only a single network device is supported.
Change-Id: I013b3d439a76e8ff91a775516f7035841b040870
Signed-off-by: Michael LeMay <michael.lemay@intel.com>
Sebastien Griffoul