Microkernel on ARC works fine, was missing some declarations in the
linker file.
Also enable testing of microkernel with ARC and disable tests where
ARC is not supported yet.
Jira: ZEP-396
Change-Id: I2ac7b8dc0bea22f5d2e24832d9e3afad8df9f580
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Add missing Kconfig files and connections to expose Kconfig options
in ext/ directories. Fixup QMSI to only be exposed on platforms that
utilize it.
Change-Id: I6c6c5011b2bf2966f65aa8279dc594a244821956
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move away from native driver and use the UART driver provided
by QMSI.
All peripherals on Quark MCUs will use QMSI drivers developed
specifically for Quark and optimized for this MCU line.
Change-Id: If4e27f38736849ea3e12c269886e2a03d957b671
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we have QMSI sensor subsystem drivers, lets use them.
Change-Id: Icd301b6c044280b5b25d719b6dcc16d556a2ea8d
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we have QMSI sensor subsystem drivers, lets use them.
Change-Id: I1340ba8930fc8676f7b706540a105250ce3e51b9
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we have QMSI sensor subsystem drivers, lets use them.
Change-Id: I1776178ad6fb984d6e293dbfa8bb1d718e4c2566
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
When using the Synopsys DesignWare Synchronous Serial Interface (SSI),
the FIFO depth can vary from 2-256, depending upon how this module is built.
For quark_se_ss, it was using a depth of 8. For EM Starterkit, it will be
32. Adding this now as a configurable option. A larger FIFO really helps
reduce SPI interrupts.
Change-Id: Id2bc8470bfc08ab447d38b89c7904cff010c63bd
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Use the same Kconfig infrastructure and options for all SPI drivers.
Jira: ZEP-294
Change-Id: I7097bf3d2e1040fcec166761a9342bff707de4dd
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Most of the values are SoC specific and come from the SoC definition,
not need to define them in Kconfig.
Jira: ZEP-294
Change-Id: I962ce36b7e2361ea77ae4178bb7c86c19a241c4e
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Some ARC SOC implementations will need CONFIG_HARVARD so as to
select a different initial stack pointer (one at the top of DCCM memory),
and also to select a different linker command file that uses
ICCM and DCCM. Quark_se_ss will have HARVARD equal to n.
Change-Id: Idb7c4126866c9604e1924200ad5fdd2bc9d28269
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Avoids confusion with .gitignore rules, which were inadequate to
cover all the places where these files are found. At least in
VIM, these files are now syntax highlighted correctly.
Change-Id: I23810b0ed34129320cc2760e19ed1a610afe039e
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
I am working on porting Zephyr to ARC EM Starterkit. This board has ARC
CPUs with ICCM memories. On quark_se_ss ICCM is missing and ignored.
Change-Id: Ic49fc8ef3e6ad879ffc673b8baf34dd467f76c04
Signed-off-by: Chuck Jordan <cjordan@synopsys.com>
Remove hardcoding and make the values configurable. Also make the
Kconfig variables consistent with other architectures.
Change-Id: I69334002303d4d8abaf7363d9134fd5f46ce4eeb
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Other IOs use this format, so lets be consistent and use
I2C_0 instead of I2C0 and I2C_1 an instead of I2C1.
Change-Id: I591ab08e14bd533ef0fac38e596559da783863b8
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Remove those kconfig options that are SoC specific, and
should not be configurable via kconfig.
Change-Id: Ib7e0b81b2df1a0225fc244fea3035416d0a4f282
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Moves those kconfig options which should be declared in
SoC or board header files instead. These are the one
that are tied to SoC or board and there is no need
for them to be configurable in kconfig.
Change-Id: I243d634f1a4a11dc8dc3530d95f93371015492b7
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The base addresses are SoC specific so there is no need to make
configurable via kconfig.
Change-Id: Iaf8444f77513255d5f0112af6710243aae09f066
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Most of the #ifdef are not really needed, so clean up the file
for readability.
Change-Id: I4d15f3cb7ef4db9113d4cdadbd3309da6587c64e
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.
The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.
This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.
Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.
Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This adds conditions to the default values for device init priorities,
and make them follow the dependencies on the config options. This cleans
up the resulting .config a bit, making it easier to read.
Change-Id: Ib05806ac6108d465ffe245142ecca7a51be6df22
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
There are two major issues with the kconfig:
() Some of the config options have incorrect dependencies inside help
under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO.
() Since the SoC and board specific kconfig files are parsed first,
the help screen would say, for example, CONFIG_SPI is defined at
arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because
the actual config is defined in drivers/spi/Kconfig.
These cause great confusion to users of menuconfig/xconfig.
To fix these, the SoC and board defaults are now to be parsed last.
Note that the position swapping of defaults in this patch is due to
the fact the the default parsed last will be used.
And, spi_test is broken due to the fact that it requires
CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is
bypassed for now.
Origin: refactored and edited from existing files
Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Changed names of Kconfig flags, variables, functions, files and
return codes consistent with names used in the RFC. Updated
relevant comments to match the changes.
Origin: Original
Change-Id: Ie7941032d7ad7af61fc02928f74538745e7966e8
Signed-off-by: Ramesh Thomas <ramesh.thomas@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch replaces all occurrences of DEV_* codes by errno.h codes at
the arch layer.
Change-Id: I1a1ab6d0481f3660ad032e2690d2577245fe1f34
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
The peripherals utilizing UART were required to register their own
ISR rountines. This means that all those peripherals drivers need
to know which IRQ line is attached to a UART controller, and all
the other config values required to register a ISR. This causes
scalibility issue as every board and peripherals have to define
those values.
Another reason for this patch is to support virtual serial ports.
Virtual serial ports do not have physical interrupt lines to
attach, and thus would not work.
This patch adds a simple callback mechanism, which calls a function
when UART interrupts are triggered. The low level plumbing still needs
to be done by the peripheral drivers, as these drivers may need to
access low level capability of UART to function correctly. This simply
moves the interrupt setup into the UART drivers themselves. By doing
this, the peripheral drivers do not need to know all the config values
to properly setup the interrupts and attaching the ISR. One drawback
is that this adds to the interrupt latency.
Note that this patch breaks backward compatibility in terms of
setting up interrupt for UART controller. How to use UART is still
the same.
This also addresses the following issues:
() UART driver for Atmel SAM3 currently does not support interrupts.
So remove the code from vector table. This will be updated when
there is interrupt support for the driver.
() Corrected some config options for Stellaris UART driver.
This was tested with samples/shell on Arduino 101, and on QEMU
(Cortex-M3 and x86).
Origin: original code
Change-Id: Ib4593d8ccd711f4e97d388c7293205d213be1aec
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This patch removes the default value from some platform/SoC specific
options which are declared in drivers/gpio/Kconfig because 1) most of
the time they are not valid values and 2) the correct values are
already set in the SoC Kconfig.
It also moves the interrupt priority definition from the driver's
Kconfig to the platform's Kconfig since it is a platform-specific
configuration.
Change-Id: Id00f7907fa55025011dabce6e282a9623be23831
Signed-off-by: Andre Guedes <andre.guedes@intel.com>
Base address registers and IRQs are set in Kconfig.
Set proper SPI default to various quark_se_ss based boards.
Change-Id: Iadaae551f441457bef334f94f68cafa7c3e499d0
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Though it's an ARC core, Quark SE SS does not follow the same registers
mapping as the official DesignWare document. Some parts are common, some
not.
Instead of bloating spi_dw.c with a lot of #ifdef or rewriting a whole
new driver though the logic is 99% the same, it's then better to:
- centralize common macros and definitions into spi_dw.h
- have a specific spi_dw_quark_se_ss_reg.h for register map, clock
gating and register helpers dedicated to Quark SE SS.
- have a spi_dw_regs.h for the common case, i.e. not Quark SE SS.
GPIO CS emulation and interrupt masking ends up then in spi_dw.h.
Clock gating is specific thus found in respective *_regs.h header.
Adding proper interrupt masks to quark_se_ss soc.h file as well.
One of the main difference is also the interrupt management: through one
line or multiple lines (one for each interrupt: rx, tx and error). On
Quark SE Sensor Sub-System it has been set to use multiple lines, thus
introducing relevant Kconfig options and managing those when configuring
the IRQs.
Quark SE SS SPI controller is also working on a lower level, i.e. it
requires a tiny bit more logic from the driver. Main example is the data
register which needs to be told what is happening from the driver.
Taking the opportunity to fix minor logic issues:
- ICR register should be cleared by reading, only on error in the ISR
handler, but it does not harm doing it anyway and because Quark SE SS
requires to clear up interrupt as soon as they have been handled,
introducing a clear_interrupts() function called at the and of the ISR
handler.
- TXFTLR should be set after each spi_transceive() since last pull_data
might set it to 0.
- Enable the clock (i.e. open the clock gate) at initialization.
- No need to mask interrupts at spi_configure() since these are already
masked at initialization and at the end of a transaction.
- Let's use BIT() macro when relevant.
Change-Id: I24344aaf8bff3390383a84436f516951c1a2d2a4
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Decisions on compiler optimizations were done on the architecture level,
this does not scale and some SoCs will have different optimization levels
or compiler options needed. Moving this to the SoC makes it easy to optimize
differently when using the same CPU which we use to set the right optimization
now on the architecture level.
For IAMCU platforms, use the right architecture and tuning.
-march=lakemont -mtune=lakemont -miamcu -msoft-float
Change-Id: I458afca5feb9be5de8dcae559d6dcac3c6d6a2a7
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
It's not a function and requires all its arguments to be build-time
constants. Make this more obvious to the end user to ease confusion.
Change-Id: I64107cf4d9db9f0e853026ce78e477060570fe6f
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Mostly SoC initialization and some kernel subsystems, but also some
device drivers like the interrupt controllers.
Change-Id: I8dc1844c33acd877c075b6b03558fdca6f87500b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
This is the last step before obsoleting DEVICE_DEFINE() and
DEVICE_INIT_CONFIG_DEFINE().
Change-Id: Ica4257662969048083ab9839872b4b437b8b351b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_DEFINE() so that it fits in the 'device' namespace.
Change-Id: I3af3a39cf9154359b31d22729d0db9f710cd202b
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Rename it to DEVICE_INIT_CONFIG_DEFINE(), because (a) it was not fitting
in any namespace and (b) it is not used to declare, but rather define a
object.
Change-Id: I1da5822f06b85a9fb024b5b184afd0ccc01012ec
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
Enable both controllers by default if GPIO is enabled, providing all the
necessary information.
Change-Id: I5aab00324b10492eefb67e9595da491775cbd95d
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
There is no such thing as "IA" in Quark SE SS as it is an ARC core. Plus
for this very specific feature it does not require the ARC aux regs
instruction to read/write in the given mask address.
And fixing also the CONFIG_ option to check.
Change-Id: I1f63348ec85f6e006795f7641c912a30fc003709
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This is valid only for Quark SE and Quark SE SS, where it requires to
unmask the interrupt for each specific controller. Thus making the
function generic, using the parameter as the specific mask base address.
Change-Id: Iea0a412b8d94a1ab5e1f3e339eaf632eacee5797
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This reverts commit 778d5b11c5327be4b40c7745e9beaecfd6327e13.
This patch has been identified as breaking the build when trying
to manually build non-x86 applications.
Change-Id: I1857745049dfef7193de58737108314b7aae01c5
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This converts the i2c_quark_se_ss to use the static IRQ API.
Note that, even with separate config functions for each instance of
the driver, it is still saving both RAM and ROM space.
Change-Id: Ieb555ff281b384d87d8e69f6914878bbee0e2ee9
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Decisions on compiler optimizations were done on the architecture level,
this does not scale and some SoCs will have different optimization levels
or compiler options needed. Moving this to the SoC makes it easy to optimize
differently when using the same CPU which we use to set the right optimization
now on the architecture level.
For IAMCU platforms, use the right architecture and tuning.
-march=lakemont -mtune=lakemont -miamcu -msoft-float
Change-Id: I0f77cffe7a139f8b2620935094437d0dfd160dfe
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Kbuild system first looks for a Kbuild file, then it looks for
a make file.
Use the Kbuild for object building and leave the Makefile for definding
build options and compiler flags and other SoC related defines.
Change-Id: I0be59bb5ae02a29108a188efbd6f14dcdb7de4ee
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The interrupt API has been redesigned:
- irq_connect() for dynamic interrupts renamed to irq_connect_dynamic().
It will be used in situations where the new static irq_connect()
won't work, i.e. the value of arguments can't be computed at build time
- a new API for static interrupts replaces irq_connect(). it is used
exactly the same way as its dynamic counterpart. The old static irq
macros will be removed
- Separate stub assembly files are no longer needed as the stubs are now
generated inline with irq_connect()
ReST documentation updated for the changed API. Some detail about the
IDT in ROM added, and an oblique reference to the internal-only
_irq_handler_set() API removed; we don't talk about internal APIs in
the official documentation.
Change-Id: I280519993da0e0fe671eb537a876f67de33d3cd4
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Anas Nashif