2772843cf1
bbram: npcx: Add emulator
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Add an emulator for the NPCX BBRAM which supports reading and writing
Signed-off-by: Yuval Peress <peress@google.com>
2024-01-12 09:59:31 +01:00
69dfb2fee3
bbram: mcp7940c: Add emulator
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Add an emulator for the mcp7940c BBRAM that supports reading and writing.
Signed-off-by: Yuval Peress <peress@google.com>
2024-01-12 09:59:31 +01:00
59675bf682
bbram: it8xxx2: Add emulator implementation
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Add an emulator that supports reading and writing to the it8xxx2 bbram.
Signed-off-by: Yuval Peress <peress@google.com>
2024-01-12 09:59:31 +01:00
95bdfb5c33
bbram: add support from user threads
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Provide the necessary handlers to support bbram access from userthreads
solves #61868 .
Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2023-08-29 10:26:07 +02:00
f9fd899da0
drivers: bbram: Add Microchip MCP7940N driver
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Adds Microchip MCP7940N battery-backed RAM support.
Signed-off-by: Jamie McCrae <jamie.mccrae@nordicsemi.no>
2023-03-01 08:55:39 +01:00
f7fca220ba
drivers: bbram: Introduce BBRAM shell
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Add 'bbram' command which is very convenient tool for examining and
modyfying BBRAM content.
Examples:
Write one byte:
$ bbram write backup_regs 0x1 0xaa
Write many bytes (starting from 0x13):
$ bbram write backup_regs 0x13 0xa 0xb 0xc 0xd 0xe 0xf 0xaa 0xab 0xac
Read whole BBRAM:
$ bbram read backup_regs
Read many bytes (4 bytes starting from address 0x14 in this case):
$ bbram read backup_regs 0x14 4
Read one byte (from 0x14 address):
$ bbram read backup_regs 0x14
Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-12-08 16:47:09 +09:00
e02456a52d
drivers: bbram: Introduce STM32 BBRAM driver
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STM32 battery-backed RAM is organized in 4 byte registers. Number of
registers can vary between models from 5 to 32 registers.
Usually, the registers are part of RTC. On some variants they are part
of tamper module. On STM32F1 the registers are in separate module. For
now, only backup registers from RTC are supported.
Signed-off-by: Patryk Duda <pdk@semihalf.com>
2022-12-08 16:47:09 +09:00
9f3d90e283
drivers: bbram: Add bbram driver for mec device
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Add bbram driver for Microchip mec device
Signed-off-by: Jay Vasanth <jay.vasanth@microchip.com>
2022-02-21 22:17:52 -05:00
74b9a607b4
drivers: bbram: Add it8xxx2 BBRAM driver implementation
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Note that the it8xxx2 does not support a status register so that
functionality is omitted.
This change also adds driver tests that build both the npcx and it8xxx2
drivers.
Signed-off-by: Yuval Peress <peress@chromium.org>
2021-08-30 11:35:23 -04:00
268f9bf163
nuvoton: battery-backed ram
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Add bindings and entry for the battery-backed ram in the nuvoton
npcx. This commit is an upstream port of
https://source.chromium.org/chromiumos/chromiumos/codesearch/+/main:src/platform/ec/zephyr/dts/bindings/cros_bbram/nuvoton,npcx-cros-bbram.yaml;l=1;drc=e9af813c36b7b411bf2a01cbc1b09d5fdec49b8a
Along with a bit of cleaning up and an emulator.
Signed-off-by: Yuval Peress <peress@chromium.org>
2021-08-07 20:32:33 -04:00
Yuval Peress