Commit Graph

18 Commits

Author SHA1 Message Date
Maureen Helm 15baad9419 soc: riscv32: Move rv32m1 flash memory definitions to dts
Moves the flash memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-05-06 19:09:59 -04:00
Maureen Helm cf1be5a3c5 soc: riscv32: Move rv32m1 sram memory definitions to dts
Moves the sram memory definitions from Kconfig to device tree for the
rv32m1 ri5cy and zero-riscy cores.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-05-06 19:09:59 -04:00
Maureen Helm fe4b1ff0c3 boards: rv32m1_vega: Use different openocd config file for each core
Adds a new argument to the openocd runner to optionally specify the
config file. Updates the rv32m1_vega board to use different openocd
config files for the ri5cy and zero-riscy cores.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-05-06 14:52:17 -05:00
Maureen Helm cf1d374276 boards: rv32m1_vega: Introduce zero-riscy configuration
Introduces a new rv32m1_vega board configuration for the zero-riscy
core. It assumes that the soc has been reconfigured with openocd to boot
to the zero-riscy core instead of the ri5cy core.

Refactors the board-level device tree so the ri5cy and zero-riscy
configurations share common definitions for the led, button, and sensor
nodes.

Tested with:
- samples/hello_world
- samples/synchronization
- samples/basic/blinky
- samples/basic/button
- samples/sensor/fxos8700

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-05-06 14:52:17 -05:00
Henrik Brix Andersen 766abcc0ad boards: rv32m1_vega: enable the onboard I2C busses and FXOS8700 sensor
Enable the onboard I2C busses and the FXO8700 sensor attached to
I2C_3.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-04-22 08:40:03 -05:00
Ulf Magnusson 7fdb525754 kconfig: Use 'default' instead of 'def_bool' in Kconfig.defconfig files
Same deal as in commit 4638652214 ("Kconfig: Use 'default' instead of
'def_bool' in Kconfig.defconfig files"), fixing new stuff that got
introduced since then.

Some symbols, like ALTERA_AVALON_PIO, are only defined in
Kconfig.defconfig files, and so need the def_bool.

Motivation (from the note at the end of
guides/kconfig/index.html#common-shorthands):

For a symbol defined in multiple locations (e.g., in a Kconfig.defconfig
file in Zephyr), it is best to only give the symbol type for the "base"
definition of the symbol, and to use 'default' (instead of 'def_<type>'
value) for the remaining definitions. That way, if the base definition
of the symbol is removed, the symbol ends up without a type, which
generates a warning that points to the other definitions. That makes the
extra definitions easier to discover and remove.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-04-18 12:20:49 -04:00
Henrik Brix Andersen c0a1f46363 boards: rv32m1_vega: fix I2C bus references
Fix the I2C bus references in the RV32M1 Vegaboard documentation.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-04-17 19:47:22 -05:00
Henrik Brix Andersen 55502df866 boards: rv32m1_vega_ri5cy: add STS LED to DTS
Add the status LED to the DTS of the RV32M1 Vegaboard RI5CY device
tree.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2019-04-17 19:45:15 -05:00
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Kumar Gala 5e26c27fb7 boards: rv32m1_vega: Enable building with Zephyr toolchain
Now that we have SDK 0.10.0 we can enable building this board with the
Zephyr toolchain.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-03-13 17:02:05 -05:00
David B. Kinder 505cc2bb0e doc: use :zephyr_file: where appropriate
A new role :zephyr_file: is available that renders to a link to the file
or folder in GitHub.  Find appropriate references using :file: and
convert to :zephyr_file: to take advantage of its linking capability.

Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
2019-03-09 09:50:27 -05:00
Kumar Gala 096d2e3022 boards: rv32m1_vega: Have identifier match name
We expect that identifier in yaml will match board name for sanitycheck.
Change the identifier to match so sanitycheck runs propertly.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2019-03-01 09:51:07 +01:00
Maureen Helm d5351d8c3d boards: rv32m1_vega: Fix red and blue led labels
The red and blue led labels were swapped on the rv32m1_vega board.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-02-20 16:57:45 -06:00
Anas Nashif b71cadb4cd boards: rv32m1_vega: move image under overview
Image of the board needs to be under overview and integrated into the
text.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-11 07:45:21 -05:00
Anas Nashif 0e4ff809d7 doc: boards: move all board docs to be index.rst
Be consistent in how board docs are named and move all to index.rst.
This will make the URL to the board documentation predictable and easier
to remember.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-02-09 17:22:08 -06:00
Carles Cufi 41b63571a4 doc: west: Document west build
Document the `west build` command in the section corresponding to the
west commands that deal with the CMake cache, which is now named
"Building, flashing and debugging" for consistency.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2019-02-08 14:58:28 -05:00
Marti Bolivar a7342daedc boards: rv32m1_vega: fix the location of the YAML file
This needs to match the defconfig name.

Signed-off-by: Marti Bolivar <marti@foundries.io>
2019-01-30 13:42:03 -06:00
Marti Bolivar 312ed45345 boards: riscv32: add rv32m1_vega
This board directory supports the RV32M1 Vega board when targeting
a RISC-V CPU core on the main SoC.

Currently, only RI5CY support is provided via the rv32m1_vega_ri5cy
board name.

Signed-off-by: Marti Bolivar <marti@foundries.io>
Signed-off-by: Michael Scott <mike@foundries.io>
2019-01-25 11:59:46 -05:00