Commit Graph

16 Commits

Author SHA1 Message Date
Anas Nashif 429c2a4d9d kconfig: fix help syntax and add spaces
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-13 17:43:28 -06:00
Anas Nashif 9c1da0dfa6 kconfig: clean CPU features and define only once
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-11-27 22:15:30 -05:00
Anas Nashif 780324b8ed cleanup: rename fiber/task -> thread
We still have many places talking about tasks and threads, replace those
with thread terminology.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-30 18:41:15 -04:00
Chunlin Han 95d28e53bb arch: arm: add initial support for CONFIG_USERSPACE
add related configs & (stub) functions for enabling
CONFIG_USERSPACE on arm w/o build errors.

Signed-off-by: Chunlin Han <chunlin.han@linaro.org>
2017-09-26 10:00:53 -07:00
Kumar Gala 26811defc7 arm: dts: Cleanup HAS_DTS
Now that all ARM platforms have a device tree we can move selecting of
HAS_DTS up and remove any !HAS_DTS cases, as well as setting in all the
defconfigs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-15 13:22:54 -04:00
Vincenzo Frascino e37214062c arm: core: mpu: Add ARM MPU support
This patch adds an initial driver for the ARM MPU.
This driver has been tested on ARM Beetle and STM32F4.

Change-Id: I2bc4031961ec5a1d569929249237646f4a349f16
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2017-04-25 21:53:17 +00:00
Vincenzo Frascino 0974496d52 arm: core: Add MPU parameter to the arm core
This patch add the Memory Protection Unit parameter to the arm core
configuration.

Change-Id: Ifee8cdd5738391a6f182e8d0382d27eeb8c546ba
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Signed-off-by: Marc Moreno <marc.morenoberengue@linaro.org>
2017-04-25 21:53:16 +00:00
David Brown 0c476a58b7 misc: Generalize LOAD_OFFSET support
Instead of FLASH_LOAD_OFFSET being something specific to cortex-m, add
it generally to misc/Kconfig, along with a hidden config
HAS_LOAD_OFFSET which can be selected by the architectures as they add
support for the functionality.

Change-Id: I256ff8cf4e9b8493b26354c3b93fe1f7017d4887
Signed-off-by: David Brown <david.brown@linaro.org>
2017-04-14 01:35:59 +00:00
Kumar Gala 457a5988c4 arm: cmsis: Introduce CMSIS layer
Support using CMSIS defines and functions, we either pull the expect
defines/enum from the SoC HAL layers via <soc.h> for the SoC or we
provide a default set based on __NVIC_PRIO_BITS is defined.

We provide defaults in the case for:
	IRQn_Type enum
	*_REV define (set to 0)
	__MPU_PRESENT define (set to 0 - no MPU)
	__NVIC_PRIO_BITS define (set to CONFIG_NUM_IRQ_PRIO_BITS)
	__Vendor_SysTickConfig (set to 0 - standard SysTick)

Jira: ZEP-1568

Change-Id: Ibc203de79f4697b14849b69c0e8c5c43677b5c6e
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-23 15:15:54 -06:00
David B. Kinder ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Anas Nashif 92c5f91413 arm: systick: Some SoCs do not have systick
Make the systick feature optional that can be selected by the SoC.

Change-Id: I4a405640b84daecc17fc1882743d3cafb78ff861
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2016-11-27 19:39:26 +00:00
Benjamin Walsh 7f4c294e5c arm: use interrupt stack during early init
The ARM Cortex-M early boot was using a custom stack at the end of the
SRAM instead of the interrupt stack. This works as long as no static
data that needs a known initial value occupies that stack space. This
has probably not been an issue because the .noinit section is at the
very end of the image, but it was still wrong to use that region of
memory for that initial stack.

To be able to use the interrupt stack during early boot, the stack has
to be released before an interrupt can happen. Since ARM Cortex-M uses
PendSV as a very low priority exception for context switching, if a
device driver installs and enables an interrupt during the PRE_KERNEL
initialization points, an interrupt could take precedence over PendSV
while the initial dummy thread has not yet been context switched of and
thus released the interrupt stack. To address this, rather than using
_Swap() and thus triggering PendSV, the initialization logic switches to
the main stack and branches to _main() directly instead.

Fixes ZEP-1309

Change-Id: If0b62cc66470b45b601e63826b5b3306e6a25ae9
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-11-23 00:23:59 +00:00
Kumar Gala 79606bccf0 arm: Add support for both floating point ABIs
Add a Kconfig option to select between the Hard and Soft Float ABIs.  We
also default to the Hard Float ABI as this is what older SDK versions
supported.

JIRA: ZEP-555
Change-Id: I2180c98cd7556ab49f5ca9b46b31add2c11bd07b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2016-08-11 17:37:12 +00:00
Peter Mitsis 005925e2dd arm float: Add Kconfig options
Adds Kconfig options CPU_HAS_FPU, FLOAT and FP_SHARING for the arm
architecture.

NOTE: All SOCs in the MK64F12 family have an FPU so that makes it a
convenient location to enable the hidden CPU_HAS_FPU option.

Change-Id: I71771d24f20f52079314bb8db9bf8a0aa827ab41
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-07-01 19:44:15 +00:00
Javier B Perez Hernandez f7fffae8aa Change BSD-3 licenses to Apache 2
Change all the Intel and Wind River code license from BSD-3 to Apache 2.

Change-Id: Id8be2c1c161a06ea8a0b9f38e17660e11dbb384b
Signed-off-by: Javier B Perez Hernandez <javier.b.perez.hernandez@linux.intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Allan Stephens <allan.stephens@windriver.com>
Signed-off-by: Benjamin Walsh <benjamin.walsh@windriver.com>
2016-02-05 20:24:29 -05:00
Peter Mitsis 36e352dc2f arm: Improve Kconfig option organization
The Cortex-M related Kconfig menus and options no longer show up at the top
level when "make ARCH=arm menuconfig" is issued.  They show up under the
"General Platform Configuration" menu.

Change-Id: I6bf012e628212340f5e089d0193a9a71d90c79b9
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-02-05 20:14:42 -05:00