Commit 09ba258b05 changed the maxdepth
of the entire samples toctree to 4 from 2 while making a fix to the
tensorflow docs.
Unfortunately that makes the docs index page for the samples too long,
as there are a lot of samples. It's better to just link each one by
one and let the user click to the one they want to find out
information on building and running the sample. Since the individual
README for each sample is usually quite short; it's not a lot of
scrolling, and the per-sample toctree is already available in the
sidebar anyway.
Fix this issue with the index page by restoring the original maxdepth.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
Fix index.rst and README.rst to put TensorFlow samples under
External Module samples next to Nanopb sample to avoid 4-level
indentation in the sidebar.
Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
Add the nanopb library and generator tools as a module.
Nanopb is a small code-size Protocol Buffers implementation in ansi C.
It is especially suitable for use in microcontrollers,
but fits any memory restricted system.
Nanopb home: https://jpa.kapsi.fi/nanopb/
Signed-off-by: Pieter De Gendt <pieter.degendt@basalte.be>
smp and mpu are architecture specific samples and do not apply to
majority of support platforms, so move them to arch/.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Sample example built with gdbstub enabled. Two serials are used, one for
normal output and another one that is used talk with gdb in the host
machine.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
This commits adds a config option to build a PSA trusted-firmware-m
(TF-M) application image for the secure processing environment, and
configures the Zephyr application image for the non-secure processing
environment. The secure and non-secure environment images will be
linked together via the veneer function table that is produced as an
artifact of the TF-M build process.
Signed-off-by: Karl Zhang <karl.zhang@linaro.org>
MetaIRQs are described in docs and exercised in tests, but there's no
sample explaining how they are intended to be used to perform
interrupt bottom half processing.
This simple tool spawns a set of worker threads at different
priorities (some cooperative) which process "messages" (which require
CPU time to handle) received from a fake "device" implemented with
timer interrupts. The device hands off the events directly to a
MetaIRQ thread which is expected to parse and dispatch them to the
worker threads.
The test demonstrates that no matter the state of the system, the
MetaIRQ thread always runs synchronously when woken by the ISR and is
able to preempt all worker threads to do its job.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Move LVGL sample from samples/gui/lvgl to samples/display/lvgl to have
a unified location for display related samples.
Signed-off-by: Jan Van Winkel <jan.van_winkel@dxplore.eu>
This sample showcases efficient utilization of SMP system
with processing of independent resource-hungry workloads.
With no cross-dependencies between workers and no usage of shared
resources (during heavy-lifting itself) we may demonstrate almost
linear scaling of efficiency. I.e. 2 cores do the same amount of
calculations twice faster than only 1 core. 4 cores complete
the same calculations 2 times faster than 2 cores.
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
Achieved using CONFIG_NET_CONFIG_CLOCK_SNTP_INIT option, i.e. querying
time over network using SNTP.
Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
Simple video sample getting frames from video capture device.
Tested with mimxrt1064_evk and MT9M114 sensor.
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
A new role :zephyr_file: is available that renders to a link to the file
or folder in GitHub. Find appropriate references using :file: and
convert to :zephyr_file: to take advantage of its linking capability.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
NavinSankar Velliangiri