Non-configurable init priority POST_KERNEL/99 might
be too late for certain uses cases (e.g. fetching data from
the file system in driver initialization). Chabge it to
be configurable so that applications can mount the
file systems earlies if they want.
Signed-off-by: Miika Karanki <miika.karanki@vaisala.com>
fs_init was just initializing mutex and dlist. Those can be
done statically. Not having the SYS_INIT function helps
in ordering the init functions in case e.g. file system
mounts are wanted to happen early stage on the system
startup.
Signed-off-by: Miika Karanki <miika.karanki@vaisala.com>
The TLA2021 driver depends on it's i2c controller and therefore needs
to be initialized later. ADC_INIT_PRIORITY by default equals
KERNEL_INIT_PRIORITY_DEVICE which should be used by independent devices.
Using this by default causing projects to fail where this driver is
enabled implicitly through board configuration and the priority is not
explicitly set.
Signed-off-by: Caspar Friedrich <c.s.w.friedrich@gmail.com>
Remove TX-Injection and Promiscuous mode setting from Wi-Fi mode shell
command. These commands are being moved to ethernet l2 layer
Signed-off-by: Vivekananda Uppunda <vivekananda.uppunda@nordicsemi.no>
This set of changes brings in raw packet tx injection mode
feature to ethernet and removes it from being a Wi-Fi only feature.
It was earlier envisaged as Wi-Fi net management feature only.
Signed-off-by: Vivekananda Uppunda <vivekananda.uppunda@nordicsemi.no>
clear_log is used as a fixture by pytest. We need to be able to call
it from the code level. Example of use in the file
test_harwaremap.py line 157.
Signed-off-by: Paszkiet Kamil <kamilx.paszkiet@intel.com>
This fixes following build error when rv32m1_vega_zero_riscy
board gets compiled:
implicit declaration of function 'INST_DT_CLOCK_IP_NAME'
Fixes#68012
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This commit introduces a driver for NXP's eDMA IP.
The main reasons for introducing a new driver are the following:
1) The HAL EDMA wrappers don't support well different
eDMA versions (e.g: i.MX93 and i.MX8QM). As such, a new
revision had to be introduced, thus requiring a new Zephyr
driver.
2) The eDMA versions found on i.MX93, i.MX8QM, and i.MX8QXP
don't use the DMAMUX IP (instead, channel MUX-ing is performed
through an eDMA register in the case of i.MX93).
Signed-off-by: Laurentiu Mihalcea <laurentiu.mihalcea@nxp.com>
Add test suite which tests writing to and erasing all pages,
of any size defined by the page layout.
If the test is built with MCUBOOT, the test will jump into the
application, then run write/erase/boundary tests on the
bootload partition. If MCUBOOT is not selected, the test will
target the slot1 partition instead, performing the same tests.
Signed-off-by: Bjarki Arge Andreasen <bjarki@arge-andreasen.me>
This commit updates the driver to use the flash layout pages,
rewriting it to utilize the flash_page_layout.c driver to
avoid duplicate code.
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
This commit adds layput page cells to the atmel sam flash
controller and the flash node. These allow for describing
the actual flash page layout of each soc, allowing the
flash driver to fully utilize the capabilities of the
flash.
With this update, we unlock the following capabilties:
- utilize 2048 erase block size for small sectors
- utilize 16384 erase block size for large sectors
Signed-off-by: Bjarki Arge Andreasen <bjarkix123@gmail.com>
Several STM32 variants include both shared IRQs for some ADCs and
separate IRQs for others (for example, STM32G473 has 5 ADCs, ADC1 and
ADC2 share one IRQ while ADC3, ADC4 and ADC5 each have unique
IRQs). The STM32 ADC driver however previously only supported either
separate IRQ lines for each operational ADC in the devicetree or a
single shared IRQ for all operational ADCs in the devicetree which
prevented all ADCs from being usable at the same time when the variant
contained a mix of both shared and separate ADC IRQ lines (only either
all the shared or all the separate and one of the shared might be used
at most for one application).
To allow for all ADCs in an STM32 variant to be usable in a single
application, generate an ISR and initialization function for each
unique IRQn as defined in the devicetree and give the task of
initialization to the first ADC which connects to that particular
IRQ. Each ISR function will generate code to call the ISR for each ADC
associated with that IRQn as was previously done for
CONFIG_ADC_STM32_SHARED_IRQS, allowing an ISR to be shared for the
ADCs sharing an IRQ while simultaneously providing separate ISRs for
each IRQ. Thus, the only information required to have ADCs either
share an ISR or not is provided by the devicetree.
Signed-off-by: Michael R Rosen <mrrosen@alumni.cmu.edu>
Extend the workaround for the unreliable SPI busy flag
to all F7 and L4 devices, which are affected by the same
erratum.
Fixes #67739
Signed-off-by: Benedikt Schmidt <benedikt.schmidt@embedded-solutions.at>
Change the gpio_qdec driver to support optical encoders.
Add a property to use for defining an arbitrary number of GPIOs for the
sensing devices (typically infrared LEDs, but could also be the
biasing for the phototransistor), and one for adding a delay between
turning those on and reading the pin status.
The infrared LEDs typically consume a non negligible amount of power, so
there's also a new idle-poll-time-us property that enables two possible
modes of operation:
- if idle-poll-time-us is zero (default) the LEDs are enabled all the
time and the driver enters polling mode using the GPIO interrupt as
with mechanical encoders. This is usable for mains powered devices and
has the lowest overhead on the CPU.
- if idle-poll-time-us is non zero, then the driver polls the encoder
all the time, turning on the LEDs just before reading the state and
shutting them off immediately after, but when the encoder is idle it
switches the polling rate to idle-poll-time-us to save power, and only
polls at sample-time-us when some movement is detected.
Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
Update helper method used by pytest fixtures. Extended upload
method with 'slot' parameter. Added searching of uploaded images
that can be tested or confirmed.
Signed-off-by: Grzegorz Chwierut <grzegorz.chwierut@nordicsemi.no>
Fix double prepare overhead considered in scheduling
extended, periodic and ISO broadcast radio events when using
LOW LAT variant.
ticks_slot maintained in ticker includes the overhead, the
ticks_slot stored in role/state context exclude the overhead
hence take care to include ticks_slot_overhead when value is
used from context and not when value used from ticker nodes.
Add jitter due to ticker resolution unit between scheduled
radio events. This will allow the synchronizing side too to
not overlap due to ticker resolution related jitter.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix ISO Synchronized Receiver sequential packing subevent
skip to next BIS subevent, so that radio channel is
correctly calculated.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Now that we have a very easy way to get the interrupt
controller and the interrupt level of a node, we can
simplify the multilevel interrupt encoding macros.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Added new test for `DT_IRQ_LEVEL` and `DT_INST_IRQ_LEVEL`.
Introduced a new `vnd.cpu-intc` compatible so that we have a
root level interrupt controller that acts as level 1
aggregator, and modified `test_intc` to be level 2 aggregator,
updated test of `DT_IRQN(TEST_I2C_BUS)` accordingly.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
Currently it is tedious to know the level of an interrupt for
a node in C. One would have to go through a very complex and
error prone macros to check if there's a parent interrupt
controller & if the controller has an interrupt number and thus
not a pseudo interrupt controller like the one found in
`rv32m1`. The level of a node is required to encode the
Zephyr's multi-level interrupt number
Since it is easier to do it in the `gen_defines` script, let's
do the heavy lifting there so that we can introduce new DT
macros to get the interrupt level very easily later.
Signed-off-by: Yong Cong Sin <ycsin@meta.com>
The POSIX API in Zephyr is considered more of a library than a
Subsystem.
Adjust the samples doc to reflect that.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
POSIX API Samples live in another directory, but they should
still be easy to find from Portability Samples.
Signed-off-by: Christopher Friedt <cfriedt@meta.com>
Fixes an MPU fault that was occurring on some ARM platforms when
executing the events portion of the latency_measure benchmark. The
fault was tracked to an attempt by a user thread to read an MMIO
register that it did not have permissions to access.
The solution was to move the printing of the stats averages out of
the test thread and into the main thread as the main thread always
executes at kernel/supervisor level and will always have permissions
to read that MMIO register.
Fixes#67438
Signed-off-by: Peter Mitsis <peter.mitsis@intel.com>
Drop the section of the coding guidelines that's referring to Parasoft
Codescan as it's not used by the project anymore.
Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
- Due to the incresing support for ZephyrRTOS in BeagleBoard boards, it
would be good to have this entry.
- Was discussed in Discord when asking for help for PR review
Signed-off-by: Ayush Singh <ayushdevel1325@gmail.com>
When using softdevice controller on iso_broadcast sample, the BIG
created uses more than 1 subevent. This means that when you try to
use the iso_receive sample to sync it does not work.
So update the sample to use mse=0 and allow any number of subevents,
making the sample more flexible and work with SDC without any changes.
Signed-off-by: Sean Madigan <sean.madigan@nordicsemi.no>
According to PSA specification in case of `PSA_KEY_TYPE_ECC_KEY_PAIR`
function `psa_import_key` takes private key from key pair as argument.
This commit adds extraction of Private key from ECDSA key pair.
Also removes not needed `otPlatCryptoEcdsaGetPublicKey`.
Signed-off-by: Przemyslaw Bida <przemyslaw.bida@nordicsemi.no>
After removing 20ms in advertiser, all subnetwork beacons are sent as high
dense packet of frames with minimal distance between them. That might
cause collisions if beacon interval on devices will coincide.
This commit adds an artificial delay between each subnet advertsing
beacons.
Signed-off-by: Anders Storrø <anders.storro@nordicsemi.no>
It looks like all SoCs in tree check if an exception comes from an IRQ
the same way, so let's provide a common logic by default, still
customizable if the SoC selects RISCV_SOC_ISR_CHECK.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
CONFIG_RISCV_SOC_INTERRUPT_INIT=y and CONFIG_RISCV_HAS_PLIC=y are both
defaulted to y by the board SoC.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
use CONFIG_SOC_INTEL_ACE15_MTPM instead of CONFIG_ACE_VERSION_1_5.
CONFIG_ACE_VERSION_1_5 leaked from SOF.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Create NXP Drivers group separate from the platforms.
The idea being that currently there are two problems:
- All the Drivers drivers are falling under the responsibility
of the MCUX platforms' maintainers, some of whom do not have the
cycles or interest to maintain these things.
- The maintainers of the other platform groups do not get counted
as reviewers of the Drivers drivers that their platforms use.
So, separate all the driver files from the MCUX platforms, and add the
relevant people who have an interest in maintaining the Drivers, including:
- At least one maintainer of each platform group, and
- The NXP contributors who are highly active in maintaining
and reviewing the NXP drivers in upstream Zephyr.
Another two problems this PR fixes:
- The platforms of the other NXP groups are still falling under the MCUX
group. Exclude the platforms of the other NXP groups from MCUX group.
MCUX group will still be the default group for unsorted NXP platforms.
- Add a few file paths to some of these groups to cover a few missed
files, and add description properties of the NXP groups.
Signed-off-by: Declan Snyder <declan.snyder@nxp.com>
Miika Karanki