The spi nodes should have #address-cells and #size-cells properties much
like i2c does. Add these missing properties.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds a new optional dts property to define the erase block size of a
flash device. This will be used by the mcux flash driver to implement
the flash page layout function.
The value is set for all kinetis devices to match
FSL_FEATURE_FLASH_PFLASH_BLOCK_SECTOR_SIZE.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add device tree support for the "nxp,kinetis-ftfa" flash controller used
on the NXP KL2X and KW4xZ SoCs.
Fixes: #5788
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Convert NXP k6x and kw2xd flash driver to use device tree to get the
flash controller name from device tree. We introduce yaml bindings for
the "nxp,kinetis-ftfe" and "nxp,kinetis-ftfl" devices.
Fixes: #5788
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
On the various NXP Kinetis SoCs add the write-block-size property and
set it to match FSL_FEATURE_FLASH_PFLASH_BLOCK_WRITE_UNIT_SIZE for the
given SoC.
Fixes: #5788
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Where missing add compatible = "soc-nv-flash". Also added a label for
all the soc-nv-flash that we might use in the future.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds the mimxrt1052 SoC, which belongs to a new family (nxp_imx) and
series (rt) of SoCs. The mimxrt1052 integrates an Arm Cortex-M7 core,
512 KB TCM, and many peripherals including 2D graphics, an LCD display
controller, camera interface, SPDIF and I2S. Unlike other SoCs in
Zephyr, the mimxrt1052 has no internal flash.
This initial port to mimxrt1052 configures the system clock to operate
at 528 MHz, and enables the serial/uart and gpio interfaces to support
the hello_world and blinky samples. Support for additional Zephyr driver
interfaces will come later.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Adds device tree bindings for the Kinetis System Integration Module
(SIM), and defines peripheral source clocks (e.g., system clock or bus
clock) and clock gates for all Kinetis SoCs.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
This makes the SoC flash compatible with the common nonvolatile flash
YAML schema, and provides a write alignment. It mirrors work done on
nRF chips for the DFU subsystem.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Stop using CONFIG_I2C_x_DEFAULT_CFG to get the initial value. Since we
only support master mode we always default to it for initial config and
we get the bitrate from the device tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds common and Kinetis-specific pwm device tree properties, and updates
the k64 SoC and board dts files to include all four pwm nodes.
Jira: ZEP-2025
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Remove memory node from skeleton dtsi and add device_type
property in every memory node in soc dtsi files
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
This patch add the unit-address component to memory and flash
nodes. According to the DT specification, the unit-address of
a node must match the first address specified in the reg
property of the node.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Update the MCUX I2C driver and related platforms to get their I2C
information from the device tree. We also updated a few of the sensor
drivers found on the FRDM & Hexiwear boards to get their I2C bus name
from the device tree instead of directly from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This patch adds #address-cell, #size-cell properties to
cpus container node and device_type, reg properties to
cpu node.
Signed-off-by: Yannis Damigos <giannis.damigos@gmail.com>
Adds common and Kinetis-specific adc device tree properties, and updates
all Kinetis SoC and board dts files to include adc nodes.
Jira: ZEP-1396
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Currently, flash partitions used by mcuboot are defined in the
SoC-level dtsi file for NXP K6X. This should be made more granular so
that product owners can choose partition layouts to suit their
needs. To that end, move the partitions into frdm_k64f.dts.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Multiple Kinetis SoCs have the same gpio hardware as the k64 and can use
the same mcux driver, so rename the dts to be more generic.
Also fixes some stranded references to kw41z-gpio to the new
kinetis-gpio.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Multiple Kinetis SoCs have the same pinmux hardware as the k64 and can
use the same mcux driver, so rename the dts to be more generic.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Multiple Kinetis SoCs have the same lpuart hardware as the kw41z and can
use the same mcux driver, so rename the dts to be more generic.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Multiple Kinetis SoCs have the same uart hardware as the k64 and can use
the same mcux driver, so rename the dts to be more generic.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Recent changes (69255043, 91f67a13, 84628e8b, fa4a3932) add support
for a partition table in the flash. Add support for this to the nxp
k6x dtsi file. By default, code will occupy the entire flash. By
setting a chosen node in an application, the code can be linked into
one of the partitions. For example, and app could create a
'frdm_k64f.overlay' file at the top of their project with:
/ {
chosen {
zephyr,code-partition = &slot0_partition;
};
};
to place an application in slot 0.
Signed-off-by: David Brown <david.brown@linaro.org>
Now that we can utilize label in the device tree we can convert to
getting the device name for the NXP Kinetis UART out of the device tree
instead of from Kconfig.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In order to allow the use of such board, a very preliminar port was
developed. It consists of board files, as well as pinmux, uart, gpio,
spi drivers and device tree files.
Change-Id: I5753064e39e0b023cf4481744c176de26d8dbebb
Signed-off-by: Gustavo Denardin <gustavo.denardin@gmail.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Devicetree.org specifies that serial devices property used to set
baud rate is "current-speed", while zephyr uses "baud-rate".
Align property name in order to keep zephyr dts files compatible
with device tree specification and could be re-used from/to
Linux for instance. We also cleanup a few SoCs that set "baud-rate" in
the SoC dts and not the board.
Jira: ZEP-2048
Change-Id: I097e7439ee46fe77c628b56531772950382fafcc
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Adds initial support for the kw40z SoC. This SoC has all the same
peripherals as the kw41z but with less flash and ram, so the defconfig
and dts are nearly the same.
Jira: ZEP-1388
Change-Id: Ib804451e8c2c71c4ff7d342bf23f6567d1542a2d
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Move the SoC dtsi into a vendor dir so as we grow and possibly share
things with other projects we are hopefully in sync (or closer to it).
Change-Id: I71666cff49f9694eee3f5d92dac8aeea416b730a
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Kumar Gala