4 Commits

Author	SHA1	Message	Date
Nathaniel Graff	078f6098e2	soc/sifive-freedom: Use DTS to generate PLIC addrs ... Describe the MMIO register regions for the PLIC in the DTS instead of hardcoded in soc.h Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com>	2018-12-04 07:48:27 -06:00
Kumar Gala	540405c44e	dts: Update sifive PWM device tree binding/nodes for #pwm-cells ... Add #pwm-cells to the sifive PWM binding and dts files. This is to support have a pwms clients work properly. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>	2018-11-13 10:00:38 +01:00
Kumar Gala	da7ac50683	gpio: sifive: Add device tree support for GPIO generation ... Add the missing bits to the yaml, dts, and Kconfig to enable GPIO pin generation based on device tree. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>	2018-10-05 13:21:49 -05:00
Nathaniel Graff	45d5d5db48	boards: riscv: Convert HiFive1 to DTS ... Adds DTS bindings for sifive,pwm0, sifive,uart0, sifive,spi0, and riscv,plic0. Signed-off-by: Nathaniel Graff <nathaniel.graff@sifive.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>	2018-08-13 18:35:38 -05:00