Commit Graph

6 Commits

Author SHA1 Message Date
Juan Manuel Cruz b97f3f3996 eth: Add full-duplex configuration to ENC28J60
The driver originally gets the full-duplex configuration
from the PHCON1 register and PDPXMD bit as stated by the
ENC298J60 specification document section 2.6 "LED Configuration".
This section trust the board to LEDB connection to signal the
full-duplex configuration.

This commit gets the full-duplex configuration from Kconfig
symbols to allow a proper functionality even when the board
is not connecting LEDB apropriately.

Change-Id: I803958409a611e23e2c3e03f40b412f1695947af
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
2016-09-17 22:43:52 +00:00
Juan Manuel Cruz 8da0bad30a eth: Adjust ENC28J60 MAC configuration.
ENCC28J60 specs section 6.5 "MAC Initialization settings"
state that MACON3(7:5) register configure automatic padding and CRC.
It also states that the configuration 111 and 011 both configure as
all short frames to be zero padded with a valid CRC appended.

Nevertheless, experimentally, there are ocassions when configuring as 111
frames does not have a CRC appended. This frames could be rejected
by the receiver if it is configured to do so.

This commit changes configuration from 111 to 011, which is not
presenting that behavior.

Jira: ZEP-842

Change-Id: I302bb99f7a1f23b298fe0db0245963b640644040
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
2016-09-17 22:43:51 +00:00
Juan Manuel Cruz Alcaraz 6ec7fd5b42 enc28j60: Correction to ECON1.RXEN bit location
Per spec document, RXEN bit corresponds to bit 2
of the ECON1 register instead of bit 1.

Change-Id: I1bbfd048be248575a558679985ba9daadc43df0e
Signed-off-by: Juan Manuel Cruz Alcaraz <juan.m.cruz.alcaraz@intel.com>
2016-08-17 18:35:11 +00:00
Juan Manuel Cruz Alcaraz a1031ec5a6 enc28j60: rx fiber's stack size is increased
The rx fiber call contiki IP stack functions to register
received frames. This interaction requires more stack memory
in the rx fiber stack to avoid memory corruption.

Change-Id: I106339e7dd1ca9282426adfb54590e34297755b3
Signed-off-by: Juan Manuel Cruz Alcaraz <juan.m.cruz.alcaraz@intel.com>
2016-08-17 18:35:05 +00:00
Juan Manuel Cruz Alcaraz f53214e307 enc28j60: allow simultaneous reception and transmission
SPI bus is a shared resource between tx and rx processes.
The access to it must be synchronized to allow a rx process to
happen even when a tx process is taking place.
ECON1 register must be saved by the rx process and recovered
at the end to ensure that the tx process will continue operating
in the same register bank.

Change-Id: Ie9358bf02bef8ddb5bdf76c8847e998a627e5395
Signed-off-by: Juan Manuel Cruz Alcaraz <juan.m.cruz.alcaraz@intel.com>
2016-08-17 18:34:46 +00:00
Juan Manuel Cruz 184a399f61 driver: ENC28J60 Ethernet SPI module
Adds the ENC28J60 Ethernet module driver.

Origin: Original
JIRA: ZEP-291

Change-Id: I2b5790ecb251f9059f172bcaafadef24bd27207a
Signed-off-by: Juan Manuel Cruz <juan.m.cruz.alcaraz@intel.com>
2016-08-05 20:36:44 +00:00