Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
In preparation for introducing a warning.
Unquoted string defaults work through a quirk of Kconfig (undefined
symbols get their name as their string value), but look confusing. It's
done inconsistently now too.
Suggested by Kumar Gala.
Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
We want to support other toolchain not based on GCC, so the variable is
confusing, use ZEPHYR_TOOLCHAIN_VARIANT instead.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The Python-based runners have replaced the old shell scripts. Refactor
the build system accordingly:
- FLASH_SCRIPT is now BOARD_FLASH_RUNNER
- DEBUG_SCRIPT is now BOARD_DEBUG_RUNNER
The values, rather than being the names of files, are now the names of
runners in scripts/support/runner. They are still short, descriptive
names like "openocd", "jlink", "em-starterkit", etc.
Adjust the zephyr_flash_debug.py call and runner internals
accordingly. Have each runner class report a name and the commands it
can handle. This lets us move some boilerplate from each do_run()
method into the common run() routine, and enables further improvements
in future patches.
The handles_command() method is temporary, and will be replaced by a
more general mechanism for describing runner capabilities in a
subsequent patch. The initial use case for extending this is to add
device tree awareness to the runners.
To try to avoid user confusion, abort the configuration if an
xxx_SCRIPT is defined.
Signed-off-by: Marti Bolivar <marti@opensourcefoundries.com>
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.
Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.
This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.
For users that just want to continue their work with minimal
disruption the following should suffice:
Install CMake 3.8.2+
Port any out-of-tree Makefiles to CMake.
Learn the absolute minimum about the new command line interface:
$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..
$ cd build
$ make
PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
The Xtensa port was the only one remaining to be converted to the new
way of connecting interrupts in Zephyr. Some things are still
unconverted, mainly the exception table, and this will be performed
another time.
Of note: _irq_priority_set() isn't called on _ARCH_IRQ_CONNECT(), since
IRQs can't change priority on Xtensa: while the architecture has the
concept of interrupt priority levels, each line has a fixed level and
can't be changed.
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
ReST defines interpreted text roles where text enclosed by single quotes
can be "intrepreted", for example :ref:`some name` becomes a link to
a label anywhere in the doc set named "some name", :c:func:`funcname()`
becomes a link to the API documentation for "funcname", and
:option:`CONFIG_NAME` becomes a link to, in our case, the documentation
for the generated Kconfig option.
This patch fixes uses of `some name` (without a role) by either adding
an explicit role, or changing to ``some name``, which indicates inline
code block formatting (most likely what was intended).
This is a precursor to changing the default behavior of interpreted
text to treat `some name` as :any:`some name` (as configured in
doc/conf.py), which would attempt to create a link to any available
definition of "some name".
We may not change this default role behavior, but it becomes an option
after the fixes in this patch. In any case, this patch fixes incorrect
uses of single-quoted text (possibly introduced because GitHub's
markdown language uses single-quoted text for inline code formatting).
Jira: ZEP-2414
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Add board metadata to be consumed by the sanitycheck script to provide
better matching with testcases and to test based on features declated in
the board files.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Now that we can specify what toolchain is intended for each
SOC, enable some more SOCs to be built.
A full sanitycheck run will require the installation of both
RF-2016.4 and RG-2016.4 releases.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The xtensa simulator can in fact simulate a variety of Xtensa SOCs.
Fixes build for alternate xt-sim_* defconfigs.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
The xt-sim defconfigs were selecting CONFIG_SIMULATOR_XTENSA instead
of CONFIG_BOARD_SIMULATOR_XTENSA.
Fix defconfigs and rename to CONFIG_BOARD_XT_SIM to ease any future
confusion between these similarly named defconfigs.
CONFIG_SIMULATOR_XTENSA is automatically set by xt-sim's
Kconfig.defconfig, it doesn't need to be explicitly specified in the
defconfigs themselves.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This core configuration was removed from the tree since it cannot
implement irq_offload().
Remove an orphaned block in xtesna.ini.
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
More general spelling fixes, and cleaning up stray UTF-8 characters
such as curly-quotes, em- and en-dashes. Use replacement strings
for |reg| and |trade|.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
The core build in the SDK does not have a timer, making it impossible
to use this core with most of the sanity checks. We are working on
getting a special package of cores for Zephyr which meet our build
requirments; until then, remove this core as it doesn't build.
Change-Id: I3fa201f3c6b5724501e8cb1e1b8ba631436ebc23
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
* CONFIG_SOC is now properly set and we do not need a separate
XTENSA_CORE build variable
* Some unnecessary macro -D CFLAGS in the Xtensa Makefile removed
* There is no default SOC selection, it is now done explicitly in
the board's defconfig
* CONFIG_<board name> now renamed to CONFIG_SOC_<board name in
uppercase> to conform to established style.
Issue: ZEP-1711
Change-Id: I88997530db09970b7fdd1c3e3d355bfca9d0be1a
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
Master branch changed requirements for license headers while this
branch has been in development.
Change-Id: I9bce16ff275057a4bb664019628fc9b6de7aef7c
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
This platform is not a real board but let user handle the xtensa
simulator just like a board.
This is needed until a qemu like simulaotr is added to Xtensa.
Change-Id: I54ab28e86eea956cf85af3ee9b4a10f0d531e54d
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>