Commit Graph

7 Commits

Author SHA1 Message Date
Piotr Mienkowski 74cb5f9728 soc: silabs_exx32: Simplify Kconfig options
This commit simplifies Kconfig options related to handling SoC series,
part numbers. This is a first step required to add remaining part
numbers to the existing configuration.

This change is possible since all SiLabs SoCs within a single series
have a very uniform structure.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2018-12-13 12:59:27 -06:00
Endre Karlson 91c4d20214 arm: silabs: Enable DCDC before setting up clk
This enables DCDC for Silabs devices before initializing the
clock.

Signed-off-by: Endre Karlson <endre.karslon@gmail.com>
2018-12-07 13:55:31 -06:00
Gil Benkö 1f6425b1d8 arm: exx32: Add Silabs EFM32PG12B soc files
The Silicon Labs EFM32 Pearl Gecko MCU includes:

         * Cortex-M4F core at 40MHz
         * up to 1024KB of flash and 256KB of RAM
         * multiple low power peripherals

Ported from EFM32WG:
https://www.silabs.com/documents/public/application-notes/an0918.0-efm32_to_efm32jgpg_migration_guide.pdf

Signed-off-by: Gil Benkö <gil.benkoe@pm.me>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-11-21 13:42:26 -06:00
Endre Karlson bfb45055f1 soc: silabs: Enable Segger RTT
This change allows you to use RTT with EFR32 chips.

Signed-off-by: Endre Karlson <endre.karslon@gmail.com>
2018-11-13 10:53:47 +01:00
Diego Sueiro 537798db0d soc: arm: exx32: Add Silabs EFR32MG12P soc files
The Silicon Labs EFR32MG12P Mighty Gecko MCU includes:
* Cortex-M4F core at 40MHz
* up to 1024KB of flash and 256KB of RAM
* integrated Sub-GHz and/or 2.4GHz radio
* multiple low power peripherals

Signed-off-by: Diego Sueiro <diego.sueiro@gmail.com>
Signed-off-by: Endre Karlson <endre.karslon@gmail.com>
2018-10-19 13:47:49 -05:00
Marcio Montenegro 17b2ac6967 arm: exx32: Add Silabs EFM32HG soc files
The Silicon Labs EFM32 Happy Gecko MCU includes:
        * Cortex-M0+ core at 24MHz
        * Up to 64KB of flash and 8KB of RAM
        * Full speed (12 MHz) USB 2.0 Device
        * Multiple low power peripherals

Signed-off-by: Marcio Montenegro <mtuxpe@gmail.com>
Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-10-10 12:00:06 -05:00
Anas Nashif 70d819b405 arm: soc: move arm SoCs to top-dir
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00