Commit Graph

14243 Commits

Author SHA1 Message Date
Florian Vaussard 0b9f6a25ed arm: stm32f4: Add basic support for STM32F413
Add necessary Kconfig and minimal device tree in order to support
STM32F413xH variants as found on the Nucleo STM32F413 board.

Origin: Original

Change-Id: I60230c240d6acb610f16a02c62048d448476e9c5
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-05-15 13:22:54 -04:00
Kumar Gala 04c8709355 soc: stm32f3/f4/l4: gpio: Fix unnecessary else statement
The bitfield determining the I/O direction already defines the pin
as either input or output, cannot be none or both at the same time

This issue was reported by Coverity

Coverity-CID: 151970

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-05-15 13:22:54 -04:00
Maureen Helm f49e199c27 scripts: Add flash and debug support using pyOCD on NXP boards
Adds a new debug support script using pyOCD and configures most NXP
boards so they can use it. frdm_kw41z is the one exception because pyOCD
doesn't yet support kw41z. Tested with pyOCD v0.8.0 and the latest
DAPLink firmware for each board.

Introduces two new environment variables, PYOCD_FLASHTOOL and
PYOCD_GDBSERVER, that allow you to set custom paths to the pyOCD tools.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-05-15 13:22:54 -04:00
Florian Vaussard b5ff4cdb6f arm: stm32f4: Do not enable USART1/USART2 by default
Not all the boards (for instance the Nuclo F412) use USART1 or USART2.
Let each board enable these USARTs when really used.

Change-Id: Idfe79c724bd7b1ab154310b4a8234b52eef2298d
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-05-15 13:22:54 -04:00
Florian Vaussard eba1327719 soc: stm32f429zi: finish SOC renaming
Commit 87893ddf7a ("soc: stm32f429zi: rename SOC config flag") renamed
SOC_STM32F429XX to SOC_STM32F429XI but the text of the option should be
changed as well to reflect this restriction in scope.

Change-Id: I2627b59f805e73d6c8a3534e0feec71a4269c9ab
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-05-15 13:22:54 -04:00
Florian Vaussard fd5011ebf7 soc: stm32f407xg: finish SOC renaming
Commit 599149dfb8 ("soc: stm32f407xg: rename SOC config flag") renamed
SOC_STM32F407XX to SOC_STM32F407XG but the text of the option should be
changed as well to reflect this restriction in scope.

Change-Id: Id03529452f5ec7d7ffee214b152c4aa555e1208a
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-05-15 13:22:54 -04:00
Maureen Helm c16ad344e9 scripts: Add support for 'make debug' using Segger JLink on NXP boards
Adds a new debug support script using Segger JLink and configures all
NXP boards so they can use it. Tested with Segger JLink GDB server
V6.14b and OpenSDA v2.1 firmware.

Change-Id: Ia1b297d9c93d21db61379e22f27ae54cda3ad461
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2017-05-15 13:22:54 -04:00
Erwan Gouriou 8986f33559 soc: stm32f407xg: rename SOC config flag
Rename SOC_STM32F407XX to SOC_STM32F407XG to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file).

Change-Id: I0afa16e86b7c99b9e685004f96beeb888f9e7568
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-15 13:22:54 -04:00
Erwan Gouriou 2a10920aaf soc: stm32f429zi: rename SOC config flag
Rename SOC_STM32F429XX to SOC_STM32F429XI to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file)

Change-Id: Id188b7703d2bce0a3ded09132ff0f205efa9c143
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-15 13:22:54 -04:00
Erwan Gouriou 19a91c0272 soc: stm32l476rg: rename SOC config flag
Rename SOC_STM32L476XX to SOC_STM32L476XG to keep flash
size information.
Aim is to be able to distinguish flash size variants of
the SoC when needed (for instance in dts/arm/st/mem.h file)

Change-Id: I834bb5b83c24c39e90c0492a2b22a7c7802de361
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-15 13:22:54 -04:00
Neil Armstrong 558d50242d arm: stm32l432: Switch to STM32L432XC to retain flash size
The xC tag in the SoC reference indicates the flash size, use it in the
configuration to permit selection of correct flash size for dts.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-15 13:22:54 -04:00
Neil Armstrong 7df4b20af0 pinmux: stm32l4x: Fix USART 2 pinmux for nucleo-l432kc
The RX pin should be PA15 to use the Virtual COM port of the ST-LINK.

Also adds the missing entry in pinmux_stm32l4x.h.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
2017-05-15 13:22:54 -04:00
Vincenzo Frascino b0491f8080 boards: v2m_beetle: Add OpenOCD for debugging
This patch adds OpenOCD support to V2M Beetle for debugging purposes
only.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2017-05-15 10:51:13 -05:00
Vincenzo Frascino 051da9fd4a dts: mps2_an385: Add ARM CMSDK support
This patch adds device tree support for ARM CMSDK IPs on MPS2
AN385.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2017-05-15 10:51:13 -05:00
Vincenzo Frascino df3cec7641 dts: v2m_beetle: Add GPIO support
This patch adds the ARM CMSDK GPIO support to the V2M Beetle
device tree.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2017-05-15 10:51:13 -05:00
Vincenzo Frascino f906e7b099 dts: v2m_beetle: Add DualTimer support
This patch adds the ARM CMSDK DualTimer support to the V2M Beetle
device tree.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2017-05-15 10:51:13 -05:00
Vincenzo Frascino 2fe95044c2 dts: v2m_beetle: Add Timer support
This patch adds the ARM CMSDK Timer support to the V2M Beetle device
tree.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2017-05-15 10:51:13 -05:00
Vincenzo Frascino 8219923c26 dts: v2m_beetle: Add WDOG support
This patch adds the ARM CMSDK WDOG support to the V2M Beetle device
tree.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2017-05-15 10:51:13 -05:00
Vincenzo Frascino 603c826fa4 dts: v2m_beetle: Generate Uart base addr
This patch enables the generation of the ARM CMSDK UART base address
from the device tree.

Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
2017-05-15 10:51:13 -05:00
Erwan Gouriou 9208d9f8db drivers: clock_control: fix AHB2 bus clock activation on stm32f4
During introduction of LL clock_control driver on stm32f4 series,
AHB2 clock activation/deactivation case was let under stm32l4 condition
preventing activation of this clock with F4 series.
This patch fixes the issue.

Change-Id: I5e488e990d33252f491f8960fc7a798ca3416be2
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2017-05-15 08:27:27 -05:00
Luiz Augusto von Dentz 4f019eab26 Bluetooth: shell: Remove forward declaration
It is possible to remove the forward declaration of l2cap_alloc_buf as
the recv pointer can be compared directly with chan pointer avoiding
using l2cap_ops directly.

Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
2017-05-14 17:54:46 +03:00
Vinayak Kariappa Chettimada 9fd04ea272 Bluetooth: shell: Add L2CAP throughput measurement
Added l2cap-metrics command to shell application which will
collect the rx-ed L2CAP CoC throughput.

Usage (local shell):
> l2cap-register <chan>
> l2cap-metrics on

  From peer shell:
  > l2cap-connect <chan>
  > l2cap-send 10

> l2cap-metrics
l2cap rate: 119225 bps.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-14 11:19:27 +03:00
Vinayak Kariappa Chettimada 14365080d2 Bluetooth: l2cap: Fix initial credit calculaton for MTU < MPS
When required Rx MTU is less than configured Rx MPS, the
resultant initial credits was 0 which prevented any L2CAP
packet to be received.

Fixed by ceiling the initial credits count in the credits
calculation.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-14 09:57:13 +03:00
Andrew Boie 636f609d66 tests: kernel: fatal: check stack overflow
For all arches except ARC, enable stack sentinel and test that
some common stack violations trigger exceptions.

For ARC, use the hardware stack checking feature.

Additional testcase.ini blocks may be added to do stack bounds checking
for MMU/MPU-based stack protection schemes.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-13 15:14:41 -04:00
Andrew Boie 5dcb279df8 debug: add stack sentinel feature
This places a sentinel value at the lowest 4 bytes of a stack
memory region and checks it at various intervals, including when
servicing interrupts or context switching.

This is implemented on all arches except ARC, which supports stack
bounds checking directly in hardware.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-13 15:14:41 -04:00
Andrew Boie 9175d20ceb arc: fix CONFIG_ARC_STACK_CHECKING
- There's no clear need to disable frame pointers if this feature is
used, remove this directive.
- The 'top' and 'base' terms are reversed. The 'base' is the high
address of the stack. The top is the lowest address, where we cannot
push further down. Fixup member and offset names to correspond to how
these terms are used in hardware documentation.
- Use correct pointers for stack top location
- Fatal exceptions now go through _NanoFatalErrorHandler to report the
faulting ip and thread.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-13 15:14:41 -04:00
Andrew Boie 41c68ece83 kernel: publish offsets to thread stack info
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-13 15:14:41 -04:00
Andrew Boie 50a533f7a5 kernel: init: mark initial dummy thread
The initial dummy thread context used for the initial __swap to
the main thread at early kernel initialization was not marked as a dummy
thread as it ought to be.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-13 15:14:41 -04:00
Youvedeep Singh 1da0a9eebd cdc_acm : Restrict writing more than 4 bytes into TX USB Endpoint.
Sometime it is observed on the Arduino 101 that when we write more than
4 bytes into TX USB Endpoint, first 4 bytes are getting repeated
(frequency of occurrence ~1/3000).

This patch does following :-

1. In sample application "cdc_acm", it adds capability to
handle partial transfer data incase data is transferred partially
if exceeds maximum data transfer size.
2. It restricts write of more than  4 bytes into TX USB Endpoint.
This is work around to  avoid issue occarance.

Jira: ZEP-2074

Signed-off-by: Youvedeep Singh <youvedeep.singh@intel.com>
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-13 15:12:27 -04:00
Andy Ross 73cb9586ce k_mem_pool: Complete rework
This patch amounts to a mostly complete rewrite of the k_mem_pool
allocator, which had been the source of historical complaints vs. the
one easily available in newlib.  The basic design of the allocator is
unchanged (it's still a 4-way buddy allocator), but the implementation
has made different choices throughout.  Major changes:

Space efficiency: The old implementation required ~2.66 bytes per
"smallest block" in overhead, plus 16 bytes per log4 "level" of the
allocation tree, plus a global tracking struct of 32 bytes and a very
surprising 12 byte overhead (in struct k_mem_block) per active
allocation on top of the returned data pointer.  This new allocator
uses a simple bit array as the only per-block storage and places the
free list into the freed blocks themselves, requiring only ~1.33 bits
per smallest block, 12 bytes per level, 32 byte globally and only 4
bytes of per-allocation bookeeping.  And it puts more of the generated
tree into BSS, slightly reducing binary sizes for non-trivial pool
sizes (even as the code size itself has increased a tiny bit).

IRQ safe: atomic operations on the store have been cut down to be at
most "4 bit sets and dlist operations" (i.e. a few dozen
instructions), reducing latency significantly and allowing us to lock
against interrupts cleanly from all APIs.  Allocations and frees can
be done from ISRs now without limitation (well, obviously you can't
sleep, so "timeout" must be K_NO_WAIT).

Deterministic performance: there is no more "defragmentation" step
that must be manually managed.  Block coalescing is done synchronously
at free time and takes constant time (strictly log4(num_levels)), as
the detection of four free "partner bits" is just a simple shift and
mask operation.

Cleaner behavior with odd sizes.  The old code assumed that the
specified maximum size would be a power of four multiple of the
minimum size, making use of non-standard buffer sizes problematic.
This implementation re-aligns the sub-blocks at each level and can
handle situations wehre alignment restrictions mean fewer than 4x will
be available.  If you want precise layout control, you can still
specify the sizes rigorously.  It just doesn't break if you don't.

More portable: the original implementation made use of GNU assembler
macros embedded inline within C __asm__ statements.  Not all
toolchains are actually backed by a GNU assembler even when the
support the GNU assembly syntax.  This is pure C, albeit with some
hairy macros to expand the compile-time-computed values.

Related changes that had to be rolled into this patch for bisectability:

* The new allocator has a firm minimum block size of 8 bytes (to store
  the dlist_node_t).  It will "work" with smaller requested min_size
  values, but obviously makes no firm promises about layout or how
  many will be available.  Unfortunately many of the tests were
  written with very small 4-byte minimum sizes and to assume exactly
  how many they could allocate.  Bump the sizes to match the allocator
  minimum.

* The mbox and pipes API made use of the internals of k_mem_block and
  had to be ported to the new scheme.  Blocks no longer store a
  backpointer to the pool that allocated them (it's an integer ID in a
  bitfield) , so if you want to "nullify" them you have to use the
  data pointer.

* test_mbox_api had a bug were it was prematurely freeing k_mem_blocks
  that it sent through the mailbox.  This worked in the old allocator
  because the memory wouldn't be touched when freed, but now we stuff
  list pointers in there and the bug was exposed.

* Remove test_mpool_options: the options (related to defragmentation
  behavior) tested no longer exist.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2017-05-13 14:39:41 -04:00
Jukka Rissanen a174d2eba7 net: http: Add HTTP server library support
This commit creates a HTTP server library. So instead of creating
a complex HTTP server application for serving HTTP requests, the
developer can use the HTTP server API to create HTTP server
insteances. This commit also adds support for creating HTTPS servers.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-13 14:30:58 -04:00
Jukka Rissanen 43b37cef31 net: conn: Check duplicate UDP/TCP connection handlers
When a new UDP or TCP connection handler is to be registered,
we need to check if identical handler has already been created.
If a duplicate is found, the registering call will return -EALREADY.

The earlier code did not check this but allowed two identical
handlers to be created. The latter handler was never called in
this case.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-13 14:30:58 -04:00
Jukka Rissanen c77460da53 net: pkt: Add function to linearize a network packet
This helper copies desired amount of data from network packet
buffer info a user provided linear buffer.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-13 14:30:58 -04:00
Jukka Rissanen 19868313fc net: samples: Fix the BT compilation in sample API
The CFLAGS and object path were set incorrectly for Bluetooth.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-13 14:30:58 -04:00
Jukka Rissanen d4c5cc10e4 net: samples: Add support to wait both IPv4 and IPv6
The net_sample_app_init() is now able to wait that both IPv4
and IPv6 addresses are setup before continuing.

Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
2017-05-13 14:30:58 -04:00
Andrew Boie 174f301147 build: simplfy how extra build steps are specified
For various reasons its often necessary to generate certain
complex data structures at build-time by separate tools outside
of the C compiler. Data is populated to these tools by way of
special binary sections not intended to be included in the final
binary. We currently do this to generate interrupt tables, forthcoming
work will also use this to generate MMU page tables.

The way we have been doing this is to generatea "kernel_prebuilt.elf",
extract the metadata sections with objcopy, run the tool, and then
re-link the kernel with the extra data *and* use objcopy to pull
out the unwanted sections.

This doesn't scale well if multiple post-build steps are needed.
Now this is much simpler; in any Makefile, a special
GENERATED_KERNEL_OBJECT_FILES variable may be appended to containing
the filenames to the generated object files, which will be generated
by Make in the usual fashion.

Instead of using objcopy to pull out, we now create a linker-pass2.cmd
which additionally defines LINKER_PASS2. The source linker script
can #ifdef around this to use the special /DISCARD/ section target
to not include metadata sections in the final binary.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-13 14:07:09 -04:00
Andrew Boie 3d3d6a85df x86: remove hacks to include functions
None of this is currently necessary, the spurious interrupt
stubs and exception entry code is included in the binary just
fine. To make matters worse, some data referenced lives in the
.intList section which is completely stripped out of the binary.

If in the future we find certain essential functions are being
garbage collected when they should not be, the proper way to
mitigate this is with KEEP() directives in the linker script.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-13 14:07:09 -04:00
Paul Sokolovsky 0fdc9b5b12 drivers: serial: Clarify usage of TX/RX IRQ predicates.
uart_irq_tx_empty() function proved to be problematic: its semantics
was not documented properly, and many hardware uses terminology like
"TX register empty" to signify condition of TX register being ready
to accept another character (what in Zephyr is tested with
uart_irq_tx_ready()). To avoid confusion, uart_irq_tx_empty() was
renamed to uart_irq_tx_complete(), propagating to drivers/serial
device methods.

The semantics and usage model of all of uart_irq_rx_ready(),
uart_irq_tx_ready(), uart_irq_tx_complete() is now described in
detail.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-05-13 10:57:31 -04:00
Vinayak Kariappa Chettimada a891415d97 Bluetooth: Print PHY update complete with status
When HCI core debug is enabled, print PHY update complete
with status on console.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-13 15:27:24 +03:00
Vinayak Kariappa Chettimada dbdc8a24b0 Bluetooth: kconfig: Use menu instead of menuconfig
To be consistent with other subsystem menu, use menu for
Bluetooth support in Kconfig instead of menuconfig which
showed up as checkbox.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-13 09:01:47 +03:00
Andrew Boie 51df312abc xtensa: merge crt1-*.S
We had two assembly files to prepare for entry into C domain,
one intended for the simulator and one intended for real boards.

- Both files merged into a single crt1.S for either simulated or real
  targets
- Extra logic to populate command line arguments from simulator removed,
  we don't use it.
- BSS zeroing logic from crt1-boards.S used
- Reference to missing reset-unneeded.S removed
- exit() implementation moved to fatal.c, now invokes a kernel panic
  if we are not running under the simulator

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-12 12:56:12 -04:00
Andrew Boie b7aa6b7bd0 xtensa: optionally build reset vector code
In real-world use-cases this isn't always needed.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-12 12:56:12 -04:00
Paul Sokolovsky 29d9f957db net: if: Clean up docstrings in header file
A half of params were described as "pointer on" (pretty strange
sounding), another half - "pointer to". Use the latter consistently.
Also, minor wording and punctuation changes.

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2017-05-12 11:14:04 -04:00
Carles Cufi ef2aecefda Bluetooth: Move hci_uart UART Kconfig to the top-level file
To allow for hci_uart builds that do not include the controller code,
move the UART Kconfig option used by the sample up one level so that it
is shared by all configurations using Bluetooth:

Jira: ZEP-2132

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-05-12 15:26:41 +03:00
Anas Nashif 63efc5f4bb xtensa: qemu: set correct clock frequency
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-12 07:00:04 -04:00
Anas Nashif f628c12b04 xtensa: rename SOC_SAMPLE_CONTROLLER
SOC_SAMPLE_CONTROLLER option name is too generic, make it Xtensa
specific to avoid confusion.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-05-12 07:00:04 -04:00
Vinayak Kariappa Chettimada 5effd68a9d Bluetooth: controller: Fix tests conf file to cover new features
Updated tests conf file with coverage for new feature Kconfig
options in the Controller. This is required to catch compile/
build regression.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-12 13:55:39 +03:00
Vinayak Kariappa Chettimada 3e0f72d7cc Bluetooth: controller: Fix missing PHY update cond. compilation
Added a missing conditional compilation #if-#endif that caused
compilation error when PHY update feature was deselected.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2017-05-12 13:55:39 +03:00
Carles Cufi 6c9e563c92 Bluetooth: Move common code to common/
Since more and more code is going to be reused by both the Host and the
Controller, this commit introduces a common/ folder that will contain
everything that is not tied to one of the two components but shared by
them.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2017-05-12 12:56:14 +03:00
Ricard Salveti 6c2eff6066 boards: 96b_carbon_nrf51: add support for 96Boards Carbon nRF51 chip
This adds support for the nRF51 chip on the board.

If you'd like to run Zephyr on the STM32F4 chip on Carbon, you need to
use the 96b_carbon board instead.

The current SPI Bluetooth protocol only uses 5 wires, so we use the
remaining pin as UART TX.

Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-05-11 22:35:28 -04:00