Commit Graph

13 Commits

Author SHA1 Message Date
Sebastian Bøe 0829ddfe9a kbuild: Removed KBuild
Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Sebastian Bøe 12f8f76165 Introduce cmake-based rewrite of KBuild
Introducing CMake is an important step in a larger effort to make
Zephyr easy to use for application developers working on different
platforms with different development environment needs.

Simplified, this change retains Kconfig as-is, and replaces all
Makefiles with CMakeLists.txt. The DSL-like Make language that KBuild
offers is replaced by a set of CMake extentions. These extentions have
either provided simple one-to-one translations of KBuild features or
introduced new concepts that replace KBuild concepts.

This is a breaking change for existing test infrastructure and build
scripts that are maintained out-of-tree. But for FW itself, no porting
should be necessary.

For users that just want to continue their work with minimal
disruption the following should suffice:

Install CMake 3.8.2+

Port any out-of-tree Makefiles to CMake.

Learn the absolute minimum about the new command line interface:

$ cd samples/hello_world
$ mkdir build && cd build
$ cmake -DBOARD=nrf52_pca10040 ..

$ cd build
$ make

PR: zephyrproject-rtos#4692
docs: http://docs.zephyrproject.org/getting_started/getting_started.html

Signed-off-by: Sebastian Boe <sebastian.boe@nordicsemi.no>
2017-11-08 20:00:22 -05:00
Anas Nashif 0356590df5 tests: samples: fix yaml syntax
Fix indentation and syntax and make it pass yamllint tool.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-10-15 08:15:00 -04:00
Andrew Boie d182d0c298 tests: gen_isr_table: don't set compiler opt
Instead, just set -O0 for the particular function which needs it.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-07 16:33:33 -07:00
Andrew Boie 6acd75b2b8 tests: gen_isr_table: set default BOARD properly
This test doesn't work on x86, which doesn't use gen_isr_tables.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-07 16:33:33 -07:00
Wayne Ren f8d061faf7 arch: arc: add nested interrupt support
* add nested interrupt support for interrupts
   + use a varibale exc_nest_count to trace nest interrupt and exception
   + regular interrupts can be nested by regular interrupts and fast
interrupts
   + fast interrupt's priority is the highest, cannot be nested
* remove the firq stack and exception stack
   + remove the coressponding kconfig option
   + all interrupts (normal and fast) and exceptions will be handled
     in the same stack (_interrupt stack)
   + the pros are, smaller memory footprint (no firq stack), simpler
     stack management, simpler codes, etc.. The cons are, possible
     10-15 instructions overhead for the case where fast irq nests
     regular irq
* add the case of ARC in test/kernel/gen_isr_table

Signed-off-by: Wayne Ren <wei.ren@synopsys.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-08-10 12:47:15 -04:00
Anas Nashif 470c5f3189 tests: remove testcase.ini files
We now use yaml files.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-21 20:56:53 -04:00
Anas Nashif cc24f4b03c tests: samples: convert testcase files to yaml
This will prepare test cases and samples with metadata and information
that will be consumed by the sanitycheck script which will be changed to
parse YAML files instead of ini.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-06-21 20:56:53 -04:00
Kumar Gala eaaa175b92 tests: convert to using newly introduced integer sized types
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.

Jira: ZEP-2051

Change-Id: I6c676bc6c5e850a8725785554cd535e32067f33e
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-04-21 09:53:49 -05:00
Jean-Paul Etienne 9acda0f695 tests: gen_isr_table: account for riscv32 architecture
Account for riscv32 SOCs supporting the riscv privileged architecture.

Change-Id: I8c26a2bcc2baded5db252896abe6e1b5ab052113
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-02-22 14:59:01 +00:00
Anas Nashif b62fbccce1 tests: gen_isr_table: disable for cortex-m0
Change-Id: Ic4c3ee2d319e60af166786b856384ee421526b81
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-02-15 00:05:14 -08:00
Andrew Boie 5c335ce55f tests: gen_isr_table: actually run the IRQ
So far, only implemented on ARM.
It's not possible to do this on Nios II and RISC-V.

Change-Id: I84c8d99cd163dff46de4bc4a7ae40768daf8e4ce
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-15 04:49:18 +00:00
Andrew Boie 122467e9ee tests: add test for gen_isr_table
This test is intended to verify that the SW ISR and vector tables
have been populated correctly.

Change-Id: Ic7f50c02dc0807d7ddefa710da67f818ff707ad6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-11 01:28:00 +00:00