To avoid confusion, callbacks using ordinal pin numbers
is going to be reverted. So the driver has to be re-worked
to expose multiple devices so each device has 32 pins.
Also fixes#12765
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This allows the shared_irq driver to be configured by device tree.
With previous implementation, only the board configuration can
override the IRQ trigger, as the trigger config is a "choice" rather
than "config". With this patch, the driver can be fully configued at
the SoC level.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
The CC2520 device is specific to the quark_se_c1000_devboard not the
intel curie SoC. Move the device node where it belongs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fix the following dts warnings:
up_squared.dts_compiled: Warning (simple_bus_reg): /soc/gpio@0:
simple-bus unit address format error, expected "d0c50000"
up_squared.dts_compiled: Warning (simple_bus_reg): /soc/i2c@91528000:
simple-bus unit address format error, expected "9158000"
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
patch adds the device binding for qmsi watchdog and device node
for socs which are using wdt qmsi driver.
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Convert over x86 based boards to use device tree instead of board.h to
describe buttons & LEDs. There are a few boards that the button gpio
flags need validation.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Makes the designware spi driver consistent with other spi drivers by
selecting HAS_DTS_SPI in the driver. This required adding spi nodes and
dts fixups to several arc and x86 socs, as well as enabling those nodes
in associated boards.
Also refactors the driver to use the base address, interrupt number, and
interrupt priority from dts.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
We get several warnings of the form:
Warning (unit_address_vs_reg): /soc/virtualcom@0:
node has a unit name, but no reg property
Fix by dropping the unit address from the node name.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_vs_reg): /cpus/arcv2-intc@0:
node has a unit name, but no reg property
Fix by removing the unit address from the nodes. Some cases we had a
reg property and a unit address for such interrupt controllers, in those
cases remove both the reg & unit address in the node name.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
We get several warnings of the form:
Warning (unit_address_format): /soc/uart@000003f8:
unit name should not have leading 0s
Fix these by remove the leading 0s.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Now that we have a common DT_SIZE_K macro use it instead of defining
__SIZE_K eveywhere. We also have DT_SIZE_M, so use that in a few
places as well.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This adds the SoC configuration for Apollo Lake. This is based
on the Atom configuration.
Origin: Original
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fix the ns16550 uart driver and relevant SoCs accordingly.
All generic settings are now DTS based.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Fix the qmsi uart driver and relevant SoCs accordingly.
Also: using config for irq everwhere relevantly and not an hardcoded
value in the driver.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Get the name generated through dts as well.
Fix the rtc driver and relevant SoCs accordingly.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Get the name and irq flags generated through dts as well.
Fix Kconfig for the gpio driver accordingly.
Irq priority is not set by dts for D2000 as it's irq controller does
not support it.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will generate the necessary configuration for the i2c controller
on quark_d2000.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will generate the necessary configuration for the 2 i2c controllers
on quark_se_c1000.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
Applying the change to relevant arch/boards, either in their Kconfig or
the dts specific files.
Taking the opportunity in dw driver to rename the variable the same way
as they are everywhere else in the code (s/dev/dw and s/port/dev) in
init function.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
This will generate the necessary configuration for the i2c controller on
quark_x1000.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
patch removes the mem.h and marcos used in that file are
moved appropriate board files. As there are boards with
different flash configuration but of same soc, flash and
ram size are moved to dts file instead of dtsi
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
When CONFIG_X86_MMU is enabled for arduino 101 the start address
should be aligned to 4kB. If not aligned the page tables would not
be created and the build fails.
Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
Move the dts files into the board dir so that board ports can be more
standalone. This will allow us at some point to have board ports
outside of the tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move the dts fixup files into the board dir so that board ports can be
more standalone. This will allow us at some point to have board ports
outside of the tree.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The port will enable Zephyr to run as a guest OS on x86-64 systems. It
comes with a test on QEMU to validate that, thus this new board
introduction. It's "make run" target will issue QEMU with the same
configuration Jailhouse upstream uses for their confis/qemu-x86.c root
cell configuration:
Test configuration for QEMU Q35 VM, 1 GB RAM, 4 cores,
6 MB hypervisor, 60 MB inmates (-4K shared mem device)
This will work provided qemu-system-x86_64 is installed in the system
and a given (qcow2) image with the Jailhouse root cell in it is
provided (any of those will ever ship with Zephyr, it's out of its
scope).
Signed-off-by: Gustavo Lima Chaves <gustavo.lima.chaves@intel.com>
Moved yaml files to be under dts/bindings and have the bindings try
and match the linux doc device tree binding dir structure as the
canonical binding reference.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
1. Use compatible "ns16550" to match upstream binding
2. Add reg-shift as optional property to binding yaml
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
patch add device tree support for develoement board of
quark_se_c1000. Previously pushed patch was flashing binary
at wrong address because of which UART was not working
Jira:ZEP-2459
test
Signed-off-by: Savinay Dharmappa <savinay.dharmappa@intel.com>
As the device tree is board specific we should be using the board
Kconfig variable to decide which .dts to use and not the SoC one for
arduino_101.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Andrei Emeltchenko