Frequency tolerance for LFRC after calibration for nRF5x
Series ICs is between 251 and 500 ppm as per Product
Specification. For more details refer to:
http://infocenter.nordicsemi.com/
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Following introduction of stm32cube LL based clock control driver,
remove references to former native driver.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Align stm32f1xx series clock driver to other parts of stm32 family.
Driver support both Connectivity and Density lines of stm32f1 series,
that are based on different Reset and Clock Control architectures.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
During introduction of LL clock_control driver on stm32f4 series,
AHB2 clock activation/deactivation case was let under stm32l4 condition
preventing activation of this clock with F4 series.
This patch fixes the issue.
Change-Id: I5e488e990d33252f491f8960fc7a798ca3416be2
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Commit 58c8d15 ("clock control:stm32: provide STM32Cube LL based
driver") added PLL initialization which disables the PLL before
configuring it.
This works if the system clock source is not the PLL (which is the
usual case for Zephyr booting out of chip reset). However, if the
SYSCLK source *is* the PLL, this halts execution.
To support this use case, switch the SYSCLK source to the
always-present HSI before disabling the PLL.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
Factor out a subroutine used to switch SYSCLK to HSI. This code will
be used again in a subsequent patch.
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
fix misspelling in Kconfig files that would show up in configuration
documentation and screens.
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
This commits align CONFIG_ factor names between stm32f4 and stm32l4
series to enable code factorization such as use of Q_DIVISOR.
Though, it does not concatenate kconfig sections as we might use
a bit of time to see what is needed in this regard
Change-Id: Ia603406d53949abf5675b801a5448397d5ab8462
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following activation of stm32 common clock driver for stm32f4 series
remove references to stm32f4 specific driver.
Change-Id: I372a0ea046007bcb34944d6b2b8880077583b1d3
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit enables STM32Cube LL based driver for stm32f4 series.
This generic driver provides a unified API to clock driver for all
stm32 series.
LL API allows driver to be lightweight and to keep genericity across
stm32 family to ease further devlopment and maintenance.
Change-Id: Ie31ae8f433313787f9c9eda77de41925721d54dd
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert code to use u{8,16,32,64}_t and s{8,16,32,64}_t instead of C99
integer types.
Jira: ZEP-2051
Change-Id: I08f51e2bfd475f6245771c1bd2df7ffc744c48c4
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
The PLLN multiplier can range between 50 and 432 on all STM32F4, except
on the STM32F401 where the lower bound is restricted to 192.
Fix the range property and the help text to reflect this reality.
Change-Id: I7b93e84b321f7869aaf611287344cd3e25c893c8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
Some fixes where needed to get PLL2 source of PREVI1 functional.
Compiled ok with following configuration:
CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV1_SRC_PLL2CLK=y
CONFIG_CLOCK_STM32F10X_CONN_LINE_PREDIV2=0
CONFIG_CLOCK_STM32F10X_CONN_LINE_PLL2_MULTIPLIER=8
Jira: ZEP-1758
Change-Id: I5ddfaef1b44c4c4e5e6adedc158a1c9092bc8df5
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit brings code size optimization as suggested by Christer
Weinigel review during review of initial commit for this driver.
It also cleans up useless definition in header file.
Change-Id: Ibeaa2e51570dff21825c60c30ba83d939b31d938
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
After introduction and activation of STM32Cube LL based driver on
F3 and L4 series, this commit removes the no more needed code for
native driver for these soc.
Change-Id: I266d1a3fc4b464cee34b1cc1a1a333c5bf923e41
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This new clock control driver aims at providing a lightweight
generic driver to the whole stm32 family.
Driver is based on LL Cube API and hence is for now available
only for STM32 supporting this API: stm32f3xx and stm32l4xx.
Other families should be supported soon.
Once globally supported, this unique driver will also help
reducing the impact of stm32 clock control heterogeneity in
other drivers.
Change-Id: Id15a8d0d44f03809b2907ef10d6877700459e674
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to use the CMSIS NVIC APIs rather than the internal ones
so we can remove them in the future.
Change-Id: I7bf3024ea4baf61f1e42bbbd5e4b0abfc6c04e6b
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.
Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.
Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file. Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.
Jira: ZEP-1457
Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Move logging out of misc/ to its own subsystem. Anything related to
logging and any new logging features or backends could be added here
instead of the generic location in misc/ which is overcrowded with
options that are not related to eachother.
Jira: ZEP-1467
Change-Id: If6a3ea625c3a3562a7a61a0ba5fd7e6ca75518ba
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
This patch adds the clock_control implementation for the ARM LTD
Beetle platform.
The main features enabled are:
* Clock on and off in ACTIVE, SLEEP and DEEPSLEEP mode.
* PLL support (freq: 12, 36, 48 Mhz).
The integration with the existing drivers will be done in future
patches.
Jira: ZEP-1300
Change-Id: I07cb2325275bd86a036e8e24aeb7bbf2c6176a93
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
Add the clock driver for the STM32L4 series.
Change-Id: Icdf79061f163d8d00187b382d1564422fb875c5b
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
This commit replaces the nanokernel.h include by kernel.h.
Change-Id: Ib42fbf2d9f77a73c0831f569b3dbbfb342ea2e1d
Signed-off-by: Flavio Santes <flavio.santes@intel.com>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
* Adds static to the containing file scope declarations.
Change-Id: Idaaa0d705a31bc69cdf7e576e303f581d3d0bd5f
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
* Adds static to the containing file scope declarations.
Change-Id: I14651826724c014cc71d62ab6cab03c668c578c0
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
* Adds static to the containing file scope declarations.
Change-Id: I6d48d2eaf6ffd5fa28b37e1d3ca2d467705110f3
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
This patch addresses the following issues:
* Aligns the Kconfig code style with Zephyr projects requirements.
* Removes redundant "depends on" from Kconfig.
Change-Id: Ic9e2fd935417fa40127bddeba4660109332087ff
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@linaro.org>
PRIMARY, SECONDARY, NANOKERNEL, MICROKERNEL init levels are now
deprecated.
New init levels introduced: PRE_KERNEL_1, PRE_KERNEL_2, POST_KERNEL
to replace them.
Most existing code has instances of PRIMARY replaced with PRE_KERNEL_1,
SECONDARY with POST_KERNEL as SECONDARY has had a longstanding bug
where the documentation specified SECONDARY ran before the kernel started
up, but actually ran afterwards.
Change-Id: I771bc634e9caf7f17dbf214a270bc9967eed7d32
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
In ST CMSIS files, FLASH_BASE does not mean base address of FLASH register
Instead FLASH_R_BASE is used.
stm32f1 clock control driver is updated to be compatible with this naming.
Change-Id: Ic4fb49c60c392e15fd12c69266baf4c686bd343b
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Based on the STM32F10x driver. Removing old code as we need to use the
bus number when dealing with 4 possible peripherals.
Change-Id: Id0263aa008e9b039ff9a00339e5622e289ffdf99
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
Signed-off-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Integrating the IRQ definitions for both nRF51 and nRF52, and defining
the set of IRQ values that are common to both.
Also switch the controller, uart and clock drivers to use the common
header definitions.
Change-Id: Id6816d7a97720896cfe4df83656fb8b1f8fb01fa
Signed-off-by: Ricardo Salveti <ricardo.salveti@linaro.org>
In the Nordic Semiconductor's nRF5x series SoC clock control
system can source the system clocks from a range of internal or
external high and low frequency oscillators and distribute them
to modules based upon a module’s individual requirements.
In this commit the implementation adds support for 16MHz
peripheral clock, 32.768 kHz RC oscillator, and 32.768 kHz
crystal oscillator clock sources.
16MHz peripheral clock is required to use the 2.4GHz Radio
peripheral. 32.768 kHz RC or crystal oscillator clock source
is required to use the real time counter peripheral.
Jira: ZEP-896
Change-id: I1a1e22322a5a26b587f3e27bb979e6296987ac1c
Signed-off-by: Vinayak Chettimada <vinayak.kariappa.chettimada@nordicsemi.no>
Clock control drivers are now using new system log macros. also update
the Kconfig variable to be a level rather than a bool.
JIRA: ZEP-311
Change-Id: Ia64e79e4e083df580861f64c661f8dbaa8a3985d
Signed-off-by: Genaro Saucedo Tejada <genaro.saucedo.tejada@intel.com>
Convert leading whitespace into tabs in Kconfig files. Also replaced
double spaces between config and <prompt>.
Change-Id: I341c718ecf4143529b477c239bbde88e18f37062
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Use SOC_SERIES_* for naming SoCs with similar features and architectures
with the goal of code reuse. The Series in the config variable should avoid
name collisions and clearly denote the relationships within an SoC family.
Change-Id: I7a98542f96b5d5dc3acc23782c4d45f98cceb599
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Most of the SoC and board Kconfig use the same values for
driver initialization priorities. So refactor them, and
discard duplicate ones.
The shared IRQ init priority was changed so that the kernel
default init and device init priorities can be standardized
across all SoC/boards. Same goes for DesignWare SPI driver.
This also changes the UART_CONSOLE_PRIORITY and
IPM_CONSOLE_PRIORITY to UART_CONSOLE_INIT_PRIORITY and
IPM_CONSOLE_INIT_PRIORITY, to standardize across all drivers.
Note that this does not take away the ability to override
those values. This just provides reasonable defaults such
that there is virtually no need to override.
Change-Id: Ibbd95d802c637df06f9a2fd48763ee1e6f4ff627
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Vinayak Kariappa Chettimada