Commit Graph

7 Commits

Author SHA1 Message Date
Leandro Pereira db6ff4da60 drivers: random: Add ESP32 random number generator driver
The random number generator from ESP32 uses noise from Wi-Fi and
Bluetooth radios.  If these are off, a pseudo-random number is
generated instead; this is currently the case, but even though it's a
black box, it's arguably better than returning a timestamp as a
pseudo-random number generator.

According to the ESP32 Technical Reference manual, the RNG passed the
Dieharder Random Number Test suite (version 3.31.1)[1], but nothing has
been said about the quality of the PRNG.

The RNG register is read directly; no effort is made to use its
contents to feed an entropy pool in a way that's similar to /dev/random
on POSIX systems, as no such subsystem exists on Zephyr at the moment.

[1] http://webhome.phy.duke.edu/~rgb/General/dieharder.php

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-09 12:26:14 -07:00
Leandro Pereira c0c79a8041 drivers: gpio: esp32: Add ESP32 GPIO driver
This provides basic GPIO support, with interrupts, and the ability to
read and write to ports on a pin-by-pin basis.

Jira: ZEP-2286
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-09 12:26:14 -07:00
Leandro Pereira f3b05c6a58 drivers: pinmux: Add pin multiplexer driver for ESP32
This implements a driver for the pin multiplexer as present in the ESP32
SoCs.

All APIs are supported.

Jira: ZEP-2297
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-08-09 12:26:14 -07:00
Leandro Pereira c78f55d0af boards: esp32: Do not use undefined CONFIG_BOARD_XTENSA
Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 18:09:13 -04:00
Leandro Pereira 0e08b946de soc: esp32: Define __start as a C function
The first stage bootloader, part of the ESP32 ROM, already sets up
a stack that's sufficient to execute C programs.  So, instead of
implementing __stack() in assembly, do it in C to simplify things
slightly.

This ESP32-specific initialization will perform the following:

  - Disable the watchdog timer that's enabled by the bootloader
  - Move exception handlers to IRAM
  - Disable normal interrupts
  - Disable the second CPU
  - Zero out the BSS segment

Things that might be performed in the future include setting up the
CPU frequency, memory protection regions, and enabling the flash
cache.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 12:35:49 -04:00
Leandro Pereira 37ea77173c drivers: esp32: Add minimal UART driver based on ROM routines
This is a minimal driver enabling console output during the port
bringup.  While the driver works, only one of the three UART devices
are supported, and there isn't any way to change any parameters or
use interrupts.  This will most likely be superceded by a proper
driver after the port has matured.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 12:35:49 -04:00
Leandro Pereira c13174935b boards: xtensa: Add ESP32 board
This is based on the work of Rajavardhan Gundi.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2017-06-21 12:35:49 -04:00