Commit Graph

12 Commits

Author SHA1 Message Date
Anas Nashif 3ae52624ff license: cleanup: add SPDX Apache-2.0 license identifier
Update the files which contain no license information with the
'Apache-2.0' SPDX license identifier.  Many source files in the tree are
missing licensing information, which makes it harder for compliance
tools to determine the correct license.

By default all files without license information are under the default
license of Zephyr, which is Apache version 2.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2019-04-07 08:45:22 -04:00
Patrik Flykt fd42bf7443 soc: Rename reserved function names
Rename reserved function names in the soc/ subdirectory.

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-04-03 17:31:00 -04:00
Piotr Mienkowski a3082e49a1 power: modify HAS_STATE_SLEEP_ Kconfig options
Add SYS_POWER_ prefix to HAS_STATE_SLEEP_, HAS_STATE_DEEP_SLEEP_
options to align them with names of power states they control.
Following is a detailed list of string replacements used:
s/HAS_STATE_SLEEP_(\d)/HAS_SYS_POWER_STATE_SLEEP_$1/
s/HAS_STATE_DEEP_SLEEP_(\d)/HAS_SYS_POWER_STATE_DEEP_SLEEP_$1/

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-03-26 13:27:55 -04:00
Piotr Mienkowski 17b08ceca5 power: clean up system power managment function names
This commit cleans up names of system power management functions by
assuring that:
- all functions start with 'sys_pm_' prefix
- API functions which should not be exposed to the user start with '_'
- name of the function hints at its purpose

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-03-26 13:27:55 -04:00
Piotr Mienkowski 204311d004 power: rename Low Power States to Sleep States
There exists SoCs, e.g. STM32L4, where one of the low power modes
reduces CPU frequency and supply voltage but does not stop the CPU. Such
power modes are currently not supported by Zephyr.

To facilitate adding support for such class of power modes in the future
and to ensure the naming convention makes it clear that the currently
supported power modes stop the CPU this commit renames Low Power States
to Slep States and updates the documentation.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-03-26 13:27:55 -04:00
Piotr Mienkowski f04a4c9deb power: rename CPU_LPS_n power states
CPU_LPS_n name used to indicate a low power state is cryptic and
incorrect. The low power states act on the whole SoC and not exclusively
on the CPU. This patch renames CPU_LPS_n states to LOW_POWER_n. Also
HAS_ pattern for Kconfig options is used in favor of a non standard
_SUPPORTED. Naming of deep sleep states was adjusted accordingly.

Following is a detailed list of string replacements used:
s/SYS_POWER_STATE_CPU_LPS_(\d)_SUPPORTED/HAS_STATE_LOW_POWER_$1/
s/SYS_POWER_STATE_CPU_LPS_(\d)/SYS_POWER_STATE_LOW_POWER_$1/
s/SYS_POWER_STATE_DEEP_SLEEP_(\d)_SUPPORTED/HAS_STATE_DEEP_SLEEP_$1/

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-02-26 02:30:13 +01:00
Piotr Mienkowski 893a7b7af0 soc: silabs: add support for setting low power states
This commit adds sys_set_power_state() function with support for EM1
Sleep, EM2 Deep Sleep, EM3 Stop power modes on Silabs SoCs.

Tested on efr32_slwstk6061a board.

Note: No support for efm32hg, efm32wg series at this point due to the
missing possibility of placing function code in RAM, required by errata
in SiLabs library code.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-02-22 12:25:57 -06:00
Piotr Mienkowski df04f7c050 soc: silabs_exx32: register 'soc' logger module
'soc' logger module may be used by any SoC related code located in soc/.
An implementation file requiring logger services should include
LOG_MODULE_DECLARE(soc, CONFIG_SOC_LOG_LEVEL);
to use the 'soc' logger instance.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-02-22 12:25:57 -06:00
Piotr Mienkowski 8bed2d5e27 soc: silabs_exx32: Add SWO logger support
By default, after reset SWO signal is not connected to GPIO pin. This
commit adds required initialization code to enable support for SWO
logger. Not all SoC series support the feature.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
2019-01-09 15:30:59 +01:00
Endre Karlson 91c4d20214 arm: silabs: Enable DCDC before setting up clk
This enables DCDC for Silabs devices before initializing the
clock.

Signed-off-by: Endre Karlson <endre.karslon@gmail.com>
2018-12-07 13:55:31 -06:00
Christian Taedcke 2eb347b174 arm: exx32: Use one common soc.c for all exx32 socs
The differentiation between the MCUs is handled in the HAL from Silabs.
So all EXX32 MCUs should use the same soc.c file.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2018-09-16 08:36:41 -05:00
Anas Nashif 70d819b405 arm: soc: move arm SoCs to top-dir
Move the SoC outside of the architecture tree and put them at the same
level as boards and architectures allowing both SoCs and boards to be
maintained outside the tree.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-09-13 00:56:48 -04:00