Commit Graph

235 Commits

Author SHA1 Message Date
Carlo Caione c5894df5ec pm: Change parameters of pm_power_state_{set,exit_post_ops}
Just pass state and substate_id instead of the whole info structure
pointer.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-02-21 20:58:01 -05:00
Carlo Caione 11f1dd2370 pm: Reference pm_state_info only by pointer
It's unnecessary to move the pm_state_info around by value, just use a
pointer.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2022-02-21 20:58:01 -05:00
Joakim Andersson aef46a8e51 soc: nrf53: Add handling of secure-only code in init with TFM enabled
Add handling of secure-only code with TF-M enabled that can only be done
from secure processing environment.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2022-02-01 11:31:36 +01:00
Krzysztof Chruscinski ff6b5d979f soc: arm: nordic_nrf: nrf53: Add Synchronized RTC
Add a module which is responsible for getting offset between RTCs
used for system clock on NET and APP cores. After getting an offset
between NET and APP clocks, it can be used for logging timestamping
on NET core to ensure that timestamping is in sync on both cores.

Synchronization is done using PPI, IPM task and events and RTC
capture feature.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-19 17:46:28 +01:00
Krzysztof Chruscinski 1f445b65fb soc: arm: nordic_nrf: nrf53: Add nrf53 series guards to Kconfig.soc
All options in Kconfig.soc are only for nrf53 series. Added file
wide guard instead of option specific options.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2022-01-19 17:46:28 +01:00
Joakim Andersson b5ac60e48b soc: nordic: Set TF-M option for nordic HAL library
Set TF-M option for nordic HAL library path to use the included
nordic HAL instead of the version that TF-M downloads.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2022-01-04 18:59:08 +01:00
Carles Cufi f0765409a7 soc: nrf: Disable DWT NULL pointer detection by default
Having DWT-based NULL-pointer detection enabled by default trips a lot
of users since it will make any debugging fail when enabled. Disable it
by default and let users enable it if they desire to.

Fixes #39216.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2021-12-20 19:18:12 +01:00
Gerard Marull-Paretas a8c93478db soc: arm: nordic_nrf: move soc_nrf_common.h to common folder
Since the addition of pinctrl the common folder is added to the Zephyr
include path. This can be re-used to place the soc_nrf_common.h header
in the common folder and include it directly, without the need of
relative paths.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Gerard Marull-Paretas 22c8c02145 drivers: pinctrl: nrf: initial support
Add initial support for nRF pin controller driver. The implementation in
this patch does not yet support any peripheral. Only states
representation and basic driver functionality is introduced.

Note:
The nrf_pin_configure function has been marked as __unused since it may
not be used in certain scenarios until all peripherals are supported by
the pinctrl driver. For example, if only UART/E is supported but the
board does not enable UART, the function will never get called. However,
that board will likely have other peripherals that will gain support in
the future.

Thanks to Marti Bolivar for bindings documentation.

Co-authored-by: Marti Bolivar <marti.bolivar@nordicsemi.no>
Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-11-26 14:20:51 +01:00
Joakim Andersson e721921587 soc: nordic_nrf: Add query items for HW peripherals missing
Add Kconfig items that can be used to query if the current SoC
support the HW peripherals for some peripherals that are missing.

Signed-off-by: Joakim Andersson <joakim.andersson@nordicsemi.no>
2021-11-11 07:24:53 -05:00
Gerard Marull-Paretas 9398d0647b pm: rename HAS_NO_SYS_PM to HAS_NO_PM
Align name with other Kconfig options (CONFIG_PM).

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-10-28 13:00:13 +02:00
Andrzej Głąbek 40329881bf soc: nrf52: Add Kconfig option for enabling REG0 DC/DC converter
Add a Kconfig option, similar to the one that is already available
for nRF5340, that allows enabling the REG0 (VDDH) DC/DC converter
in nRF52840. Make use of this option in Nordic boards: nRF52840 DK
and nRF52840 Dongle.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-10-17 11:49:26 -04:00
Gregers Gram Rygg d47bd60933 soc: nordic_nrf: Add Kconfig option for enabling trace port
Add Kconfig option to enable the hardware trace port in the SystemInit()
function.

Signed-off-by: Gregers Gram Rygg <gregers.gram.rygg@nordicsemi.no>
2021-09-28 20:11:40 -04:00
Andrzej Głąbek bcf20455ee soc: nrf53: Add missing HAS_HW_NRF_* entries
A few HAS_HW_NRF_* Kconfig options for peripherals available in nRF5340
are not selected. Fix it.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-09-28 11:30:09 +02:00
Andrzej Głąbek 72e3bfe1c0 soc: nordic_nrf: Add Kconfig options for APPROTECT handling
Add Kconfig options that allow users to select the way the APPROTECT
mechanism is handled in the SystemInit() function.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-08-24 07:27:12 -04:00
Martí Bolívar 041099f67c Bluetooth: Controller: clean up nRF DFE
The way we currently handle direction finding extension (DFE) support
on Nordic nRF5 controllers relies on required devicetree properties
related to DFE in the "nordic,nrf-radio" node.

That doesn't make sense on radios without DFE support, though.
Any .dtsi for an SoC without DFE support which has such a node would
require extraneous DFE related properties like dfe-antenna-num.

Instead of making the properties required, mark them optional. We
indicate the presence of DFE support via a new 'dfe-supported' boolean
property which the SoC .dtsi files can set (or not) depending on
support.

This gives us the opportunity to do some cleanup in the Kconfig,
removing CONFIG_HAS_HW_NRF_RADIO_BLE_DF since we know from the
devicetree whether DFE support is available.

Handle that change appropriately in radio_df.c. This gives us an
opportunity to improve readability in the devicetree-related macro
magic in that file.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-08-17 17:52:43 -04:00
Martí Bolívar 50b267f1d6 soc: nordic_nrf: add NRF_DT_GPIOS_TO_PSEL_OR
Helper macro for getting the PSEL value from optional devicetree
properties.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-08-17 17:52:43 -04:00
Martí Bolívar b1e0bacb5e soc: nordic_nrf: add NRF_RADIO base address check
Update validate_base_addresses.c for the RADIO peripheral.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-08-17 17:52:43 -04:00
Ioannis Glaropoulos 1706b4dfaa arm: rename z_platform_init to z_arm_platform_init
Platform specific initialization during early boot
has been a feature supported only by Cortex-M; the
Kconfig symbol is defined in arch/arm Kconfig space.
We rename the z_platform_init() function to
z_arm_platform_init(), to indicate more clearly that
this is an internal, private ARM-only API.

This commit does not introduce behavioral changes.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-07-28 21:08:18 -04:00
Flavio Ceolin d45a0e1919 pm: Fix weak linkage symbols
Define SoC hooks as weak symbols so this way applications can
overwritten them defining strong symbols.

The problem is that currently SoCs are defining these interfaces as
strong symbol inhibiting the possibility of applications bring their
own implementation.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-07-26 04:31:54 -04:00
Øyvind Rønningstad ff5736d662 soc: nordic_nrf: Add HAS_HW_NRF_KMU config
Indicating whether a SOC has the nRF Key Management Unit peripheral.

Signed-off-by: Øyvind Rønningstad <oyvind.ronningstad@nordicsemi.no>
2021-06-23 12:48:12 +02:00
Ioannis Glaropoulos 9fe8a207b5 soc: arm: nrf: ensure z_platform_init does not use stack memory
We should gurantee that we do not use SRAM during Zephyr early
boot, until SystemInit has returned. This commit aims to ensure
that SystemInit will be branched to, without first pushing args
to stack, even when no optimizations are selected. We chose to
define z_platform_init in assembly directly (instead of using
inline assembly) as it appears to be a cleaner design.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-06-21 17:35:30 +02:00
Ioannis Glaropoulos faad3223ec soc: nrf: move z_platform_init to a common directory
Use a common implementation for z_platform_init
in nRF SoC family. The implementations are
identical, so no need to maintain separate
identical versions of them. The commit does not
introduce behavioral changes.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-06-21 17:35:30 +02:00
Andrzej Głąbek d6949b75a7 soc: nrf53: Fix configuration of HFXO capacitance
This is a follow-up to commit 60d9988401.

Add a third option for the HFXO capacitance that keeps the default
value of the XOSC32MCAPS register untouched. The message in the above
commit incorrectly claimed that external load capacitors for HFXO
(the reset value of the XOSC32MCAPS register) was the configuration
in effect before. In fact, the register value was modified during
the device trimming in the SystemInit() function to use the internal
capacitors, and that is the configuration required for proper RADIO
operation on nRF5340 DK, for instance.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-06-17 10:29:38 +02:00
Piotr Pryga dc25a5e455 soc: arm: nrf53: Enable support for Direction Finding HW
Enable support for Direction Finding hardware for nRF5340 SOC.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2021-06-16 10:40:43 +02:00
Piotr Pryga 97774e0d84 soc: arm: nrf52: Enable support for Direction Finding HW for nRF52820
Enable support for Direction Finding hardware for nRF52820 SOC.

Signed-off-by: Piotr Pryga <piotr.pryga@nordicsemi.no>
2021-06-14 15:18:55 +02:00
Johan Stridkvist b3389d4a5b soc: nrf53: Tune capacitor for LFXO for nRF53 and update accuracy
Switch from using internal 6pf to internal 7pf load capacitor for LFXO.
Use a default clock accuracy of 50PPM as this matches lab results.

50PPM should be sufficient for common operating temperatures of
25degC +- 15.

Signed-off-by: Johan Stridkvist <johan.stridkvist@nordicsemi.no>
2021-06-12 08:52:00 -05:00
Andrzej Głąbek 60d9988401 soc: nrf53: Add configuration options for HFXO/LFXO load capacitance
Add Kconfig options that allow configuration of optional internal
load capacitors for the high-frequency (HFXO) and low-frequency
(LFXO) crystal oscillators in nRF5340.
Default settings used for the new options are those that have been
in effect so far, i.e. external load capacitors for HFXO and 6 pF
internal capacitance for LFXO.

This commit also adds missing SOC_ENABLE_LFXO option dependency on
!TRUSTED_EXECUTION_NONSECURE.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-06-09 13:07:12 +02:00
Ioannis Glaropoulos d105a2b76c arm: shrink names for null-pointer exception detection Kconfigs
Reduce the length of the Kconfig defines related to
null-pointed dereference detection in Cortex-M.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-05-26 12:30:05 -05:00
Lang Xie 7b7ed2baac soc: arm: nordic_nrf: nrf53: Fix flash page erase max time for nrf53
Increase FLASH_PAGE_ERASE_MAX_TIME_US of cpunet to be the same as the
value of cpuapp; FLASH_PAGE_ERASE_MAX_TIME_US is the execution window
duration when doing the flash operation synchronously along the radio
operations (SOC_FLASH_NRF_PARTIAL_ERASE not enabled); the previous
FLASH_PAGE_ERASE_MAX_TIME_US value of cpunet is lower than required.

Signed-off-by: Lang Xie <lang.xie@nordicsemi.no>
2021-05-26 08:30:55 -05:00
Andrzej Głąbek 797aa8b85a soc: nrf9160: Remove incorrect indication of SWO availability
Serial Wire Output functionality is not implemented in nRF9160.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2021-05-11 13:00:20 -05:00
Martí Bolívar c8e8d1d109 soc: nrf52811: add missing instance 3 check
spi1 and i2c0 share peripheral ID number 3.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-05-07 09:27:21 +02:00
Martí Bolívar 824f7224d5 soc: nrf52811: fix enabled instance 0 check
Similar fix to that for the 52805.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-05-07 09:27:21 +02:00
Martí Bolívar 8765a6b041 soc: nrf52805: fix enabled instance 0 check
UART0, TWI0, and SPI0 have different peripheral IDs (2, 3, and 4
respectively) on this SoC and therefore should not be mutually
exclusive to use.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-05-07 09:27:21 +02:00
Gerard Marull-Paretas f61649b7ba soc: replace power/power.h with pm/pm.h
Replace old header with the new one.

Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
2021-05-05 18:35:49 -04:00
Krzysztof Chruscinski 518193f444 soc: arm: nordic: Do not use PM when no multithreading
Enable by default power managment only when multithreading is
enabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-04-29 14:50:35 +02:00
Ioannis Glaropoulos 0b464dcb9c soc: nordic_nrf: move NFCT_PINS_AS_GPIOS to common nRF definitions
Kconfig symbol NFCT_PINS_AS_GPIOS may be defined for all
Nordic nRF SoCs that have the NFCT hardware, so we move
the option definition in nRF common Kconfig file. Also,
we correct the help text to reflect that nRF52 series DKs
and nRF5340 DK have different pins for NFC.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-04-26 17:21:37 +02:00
Krzysztof Chruscinski cc7a324493 soc: arm: nordic: Indicate SWO presence in nrf52, nrf53 and nrf91
Add HAS_SWO to nordic SoC series.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2021-03-15 10:23:10 +01:00
Erwan Gouriou 79ea590bef soc: nrf: Enable default DWT null pointer exception detection
Default null pointer exception detection to the DWT solution
instead of MPU based solution.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2021-03-08 19:19:14 -05:00
Martí Bolívar f7aeb2ae4b soc: nrf: add more DT GPIO helper macros
Add some helper macros that will be convenient to use from device
drivers for accessing and error checking pin mux information in the
devicetree:

- NRF_DT_PSEL(): get a PSEL value out of the DT from either a
  'foo-pin' or a 'foo-gpios' style property.

- NRF_DT_PSEL_CHECK_NOT_BOTH(), NRF_DT_PSEL_CHECK_EXACTLY_ONE():
  helpers for checking that a given devicetree is OK according to
  different criteria for setting PSEL properties (NAND or XOR on
  whether the properties exist, respectively).

See comments in the patch for more details.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-03-01 16:59:56 +01:00
Ioannis Glaropoulos 286757e3df soc: arm: nrf5340: remove handling for Erratum 19
Erratum 19 applies to earlier revisions of nRF5340 DK,
which are no longer supported in the tree, so we can
remove the code that handles it.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-02-19 15:12:28 +03:00
Ioannis Glaropoulos ce134a7970 soc: arm: nrf5340: add QDEC capability in nRF5340 SoC definition
Add Kconfig options to signify that the nRF5340
HW has support for QDEC instances. Select the
options in the nRF5340 Application core definition.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2021-02-17 22:34:20 +03:00
Martí Bolívar 60ce0e41fd soc: nrf: fix NRF_DT_CHECK_GPIO_CTLR_IS_SOC
This was merged by mistake without being tested and is not working
properly. We need to avoid doing a BUILD_ASSERT() when the relevant
property is missing, because we can't use DT_GPIO_CTLR() on an
undefined property. Handle this with COND_CODE_1().

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-02-14 16:15:16 -05:00
Peter Bigot e9b5be36db soc: nordic: disable system power management on nRF53 network core
The network core doesn't have access to the regulators necessary to
support system power management.  That has to be done on the
application core.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-02-01 15:05:03 -05:00
Peter Bigot 5d2acb30eb Revert "soc: nordic: Disable PM for SOC_NRF5340_CPUNET_QKAA"
This reverts commit f38ba314ea.

nrf5340dk_nrf5340_cpunet doesn't support power management, but that
should be handled another way.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2021-02-01 15:05:03 -05:00
Flavio Ceolin f38ba314ea soc: nordic: Disable PM for SOC_NRF5340_CPUNET_QKAA
This targets was previously enabling PM but the code was doing nothing
because the logic was under an unsatisfied ifdef condition.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 321ce7fb77 power: Use substate-id in pm subsystem
Change subsystem to use struct pm_state with substate-id instead of
using only the power state category.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin d21808b0b1 power: Remove residency and states from Kconfig
Residency time and power states are defined using device tree now.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Flavio Ceolin 579f7049c7 power: Move pm subsystem to new power states
Migrate the whole pm subsystem to use new power states information
from power_state.h and get states and residency properties from
device tree.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2021-01-22 09:31:20 -05:00
Martí Bolívar dbad2627c8 soc: nrf: add DT GPIO helper macros
Add some helper macros that will be convenient to use from device
drivers for accessing and error checking pin mux information in the
devicetree:

- NRF_DT_GPIOS_TO_PSEL(): converts a devicetree GPIO phandle
  <&gpioX pin flags> to the "PSEL style" registers found in
  nRF SoC family IPs. The conversion is done at
  build time and relies on devicetree properties.

- NRF_DT_CHECK_GPIO_CTLR_IS_SOC(): make sure a GPIO controller
  in a phandle-array property is one of the SoC GPIO controllers
  by checking its compatible is nordic,nrf-gpio.

See comments in the patch for more details.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2021-01-16 07:59:27 -06:00